VLSI CAD Timing Intern, Applied AI - Summer 2027

2100 NVIDIA USA; Santa Clara (CA); On-site; USD 28,000 - 129,000; Full time

Benefits offered by this job

Intern benefits

Competitive hourly rate

Job summary

NVIDIA Corporation is offering an internship focused on static timing analysis and ASIC design support in Santa Clara, CA. You will learn and assist with PrimeTime/Tempus flows, automate timing tasks, and analyze timing data across design corners.

The role invites strong scripting and Python skills, with access to advanced EDA tools and mentorship from CAD and methodology engineers. The program seeks graduate students pursuing a Master’s or PhD in EE/CE/CS, with coursework in VLSI, digital

Qualifications

• Currently pursuing a Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Coursework or academic knowledge in VLSI/ASIC design, digital circuits, or computer architecture.
• Exposure to agentic AI applied to back-end VLSI tasks (e.g., floorplanning, timing closure, or physical verification).
• Familiarity with static timing analysis, constraints, or digital design flows.
• Knowledge in scripting or programming (Python preferred).
• Comfort working with data, reports, and technical problem-solving in complex systems.

Responsibilities

• Learn and support static timing analysis (STA) flows using PrimeTime and Tempus for advanced ASIC designs.
• Develop and automate timing, constraints, and QoR validation flows using scripting and data-driven methods.
• Analyze timing reports, constraints, and design data across corners and modes to improve closure predictability.
• Collaborate with CAD, physical design, and methodology engineers on timing sign-off strategies.
• Contribute to AI- or analytics-assisted approaches for timing analysis or flow optimization.
• Explore how physical effects influence timing and design decisions.

Skills

Python

Scripting

Data analysis

Education

Master’s or PhD in Electrical Engineering / Computer Engineering / Computer Science

Tools

PrimeTime

Tempus

EDA tools

Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

NVIDIA is widely considered one of the technology world’s most desirable employers. We employ some of the most forward-thinking and talented people in the world. Are you passionate about joining our life work to amplify human creativity and intelligence? If you are creative, collaborative, and have a real passion for design methodology and automation, we want to hear from you.

What You’ll Be Doing:

• Learn and support static timing analysis (STA) flows using industry tools like PrimeTime and Tempus for advanced ASIC designs.
• Help develop and automate timing, constraints, and QoR validation flows using scripting and data-driven methods.
• Assist with analyzing timing reports, constraints, and design data across corners and modes to improve closure predictability.
• Collaborate with CAD, physical design, and methodology engineers on timing sign-off strategies and best practices.
• Contribute to early AI- or analytics-assisted approaches for timing analysis, constraint checking, or flow optimization.
• Explore how physical effects (e.g., IR drop, crosstalk, aging, thermal impact) influence timing and design decisions.

What we need to see:

• Currently pursuing a Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Coursework or academic knowledge in VLSI/ASIC design, digital circuits, or computer architecture.
• Exposure to applying agentic AI to back-end VLSI tasks (e.g., floorplanning, timing closure, or physical verification).
• Familiarity with the basics of static timing analysis, constraints, or digital design flows.
• Knowledge in scripting or programming (Python preferred).
• Comfort working with data, reports, and technical problem-solving in complex systems.

Ways to stand out from the crowd:

• Academic projects, research, or internships related to VLSI, physical design, STA, or EDA tools.
• Exposure to TCL.
• Exposure to machine learning, data analysis, or AI concepts applied to engineering problems.
• Experience automating workflows, analyzing large datasets, or contributing to technical tools or open-source projects.

Our internship hourly rates are a standard pay based on the position, your location, year in school, degree, and experience. The expected hourly rate for this position is 20 USD – 94 USD.

You will also be eligible for Intern benefits.

Applications for this job will be accepted at least until November 3, 2026.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA uses AI tools in its recruiting processes.

This posting is for an existing vacancy.

Learn more about NVIDIA.