Verification Engineer IV 60987-1

ZipRecruiter; Sunnyvale (CA); On-site; USD 90,000 - 150,000; Full time

Job summary

An innovative firm is seeking a Verification Engineer to join their dynamic team. In this role, you'll collaborate with researchers and engineers to develop electrical verification methods for cutting-edge products. Your responsibilities will include defining verification requirements, creating comprehensive test plans, and designing scalable testing infrastructure. This position offers a unique opportunity to contribute to advanced systems while honing your skills in a collaborative environment. If you're passionate about electrical engineering and eager to drive impactful projects, this is the perfect opportunity for you.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Science required.
• Hands-on experience in electrical verification methodologies.

Responsibilities

• Define verification methodologies in collaboration with teams.
• Develop and maintain detailed test plans for various modules.
• Design scalable test infrastructure and monitor coverage metrics.

Skills

SystemVerilog/UVM

C#

Python

LabVIEW

Test Automation Architecture

Firmware Verification

Education

Bachelor's degree in Electrical Engineering

Bachelor's degree in Computer Science

Job description

Job Description

The main function of the Verification Engineer is to work with a group of researchers and engineers to own the electrical system level verification of Facebook's products. Working closely with researchers, architects, and designers, the engineer will develop methods of electrical verification for multiple advanced systems. Responsibilities include defining verification requirements, creating test cases, designing and implementing testing infrastructure, executing tests, and reporting results.

Job Responsibilities

1. Define electrical verification methodologies in collaboration with research and design teams.
2. Develop and maintain detailed test plans for various modules and systems.
3. Design and drive the implementation of scalable test infrastructure.
4. Monitor coverage metrics, bugs, and their fixes.
5. Manage execution, interpretation, and reporting of verification work status.
6. Support system bring-up and debugging activities.
7. Communicate test plans and results clearly.

Skills

• Hands-on coding skills in SystemVerilog/UVM.
• Understanding of verification requirements definition.
• Experience managing areas of product verification.
• Knowledge of test automation architecture, design, and implementation.
• Proficiency in C#, Python, and LabVIEW.
• Experience with firmware and board-level verification.

Education/Experience

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent experience.