Verification CAD Engineer

Sandisk

Milpitas (CA)

On-site

USD 120,000 - 190,000

Full time

27 hours ago
Be an early applicant

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Sandisk is seeking a self-directed Verification Methodology Engineer to design, build, and optimize infrastructure enabling our global ASIC team to operate at high velocity. You will evaluate, integrate, and deploy advanced verification tools and methodologies across the development lifecycle.

You will architect portable, scalable environments, tackle bottlenecks, and push for write-once, run-anywhere workflows, while collaborating with ASIC design and verification teams to improve productivity.

Qualifications

  • B.S./M.S. in Electrical Engineering, Computer Engineering, or Computer Science.
  • 7+ years of Design Verification experience with chip-level functional model building.
  • Expert-level knowledge of SystemVerilog and UVM, including SVA and CDV methodologies.
  • Advanced proficiency in Python and Shell scripting; Perl a plus.
  • Experience with AI-assisted development tools to increase velocity.
  • Strong understanding of Behavioral vs. Structural models across sim/emu.
  • Familiarity with Cadence ASIC verification tools (Xcelium, SimVision, vManager, Verisium).
  • Expert-level Linux OS skills and managing large-scale regression farms (LSF, NC, Slurm).
  • Ability to document CAD flows for a global audience and train others.

Responsibilities

  • Deploy scalable, portable methodologies across IP to SOC environments.
  • Provide expert support for ASIC Design and Verification teams and enable fast debug/data analysis.
  • Build Python-based frameworks for automated testbench generation and regression management.
  • Design, develop, and maintain CAD infrastructure for verification and smooth handoffs between teams.

Skills

SystemVerilog
UVM
Python
Shell scripting
AI-assisted tools
Cadence tools
Linux
Regression farms
Debug workflows
Documentation

Education

B.S./M.S. in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Cadence Xcelium
Cadence SimVision
vManager
Verisium

Job description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.

Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality.

Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward.

Description

We are seeking a self-directed Verification Methodology Engineer to design, build, and optimize the infrastructure that enables our global ASIC team to execute at high velocity. In this role, you will evaluate, integrate, and deploy advanced third-party verification tools and infrastructure solutions while defining robust methodologies across the entire development lifecycle. Beyond architectural ownership, you will serve as a critical technical resource for the broader ASIC team, proactively identifying and resolving workflow bottlenecks, debug challenges, compute resource constraints, and license limitations. Role Overview You will contribute to Sandisk verification architecture and the verification productivity suite by scaling new verification solutions into the global team using agents, skills and other advanced techniques. You will be responsible for the creative engineering required to make the global team more productive. Rather than executing a predefined script, you will identify inefficiencies then architect a framework to support solutions. Your goal is to build a portable, scalable environment where tools and infrastructure handle the complexity.

Essential Duties & Responsibilities
  • Methodology Innovation: Deploy scalable & portable methodologies that function across different environments scaling from IP to SOC to enable "write once, run anywhere" capability.
  • Cross-Functional Support: Provide expert-level support for ASIC Design and Verification teams. Provide the automation and workflows necessary for high-speed debug and data analysis.
  • Automation & Tooling: Build robust Python-based frameworks for automated testbench generation, regression management, and intelligent failure triage.
  • Infrastructure Architecting: Design, develop, and maintain CAD infrastructure for verification. Enable seamless handoffs between IP & SOC verification teams. Use advanced techniques like formal verification paired with AI to shift left verification development.
Qualifications

Required:

  • Education: B.S./M.S. in Electrical Engineering, Computer Engineering, or Computer Science.
  • ASIC DNA: 7+ years of Design Verification experience with a deep understanding of chip-level functional model building.
  • HVL Mastery: Expert-level knowledge of SystemVerilog and UVM, including assertion-based (SVA) and coverage-driven (CDV) methodologies.
  • Automation Powerhouse: Advanced proficiency in Python and Shell scripting. Experience with Perl is a plus.
  • Modern Dev Stack: Comfortable using AI-assisted development tools to increase personal and team velocity.
  • Engine Versatility: Strong understanding of the differences between Behavioral and Structural models, with experience porting environments across simulation and emulation platforms.
  • Tools & Debug: Familiarity with Cadence ASIC verification tools (Xcelium, SimVision, vManager and Verissium)
  • Systems Thinking: Strong understanding of OOP concepts and how they apply to building scalable, maintainable verification libraries.
  • OS Proficiency: Expert-level Linux OS skills and experience managing large-scale regression farms (LSF, NC, Slurm).
  • Communication: Document complex CAD flows for a global audience. Train and help others understand and debug their usage of these workflows.
Additional Information

Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster.

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior VLSI CAD Engineer
Senior VLSI CAD Engineer

Sandisk • Milpitas (CA)

On-site
USD 140,000 - 190,000
Technologist, ASIC Verification Engineering
Technologist, ASIC Verification Engineering

WarmStart Ltd • Milpitas (CA)

On-site
USD 140,000 - 190,000
Senior Staff ASIC Platform Engineer
Senior Staff ASIC Platform Engineer

Sandisk • Colorado

On-site
USD 120,000 - 180,000
Technologist, Hardware Architect
Technologist, Hardware Architect

Sandisk • Milpitas (CA)

On-site
USD 200,000 - 260,000
AI/ML ASIC Architect
AI/ML ASIC Architect

Sandisk • Milpitas (CA)

On-site
USD 180,000 - 260,000
Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering
Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering

Sandisk • Milpitas (CA)

On-site
USD 180,000 - 240,000
Technologist, Product Development Engineering
Technologist, Product Development Engineering

Sandisk • Milpitas (CA)

On-site
USD 150,000 - 210,000
Design Verification Engineer
Design Verification Engineer

Cirrus Logic • Chandler (AZ)

On-site
USD 90,000 - 130,000
AI-Driven Verification Architect for ASICs
AI-Driven Verification Architect for ASICs

Sandisk • Milpitas (CA)

On-site
USD 120,000 - 190,000
Staff, System Product Engineering
Staff, System Product Engineering

Sandisk • California (MO)

On-site
USD 120,000 - 180,000