Validation Engineer

Saicon; San Jose (CA); On-site; USD 95,000 - 135,000; Full time

Job summary

Saicon seeks an engineering professional to join a highly technical team focused on power management features in processor silicon interface validation. You will develop and execute electrical and functional test plans, using oscilloscopes and logic analyzers, and debug issues to ensure robust performance.

The role emphasizes collaboration across engineering disciplines, documenting results, and mentoring less experienced engineers in planning, testing, and debugging processor validation tasks

Qualifications

• Bachelor's or higher in EE/CE with 2–4 years of related experience.
• Masters degree plus at least 2+ years related experience preferred.
• Experience in development and execution of platform level electrical and functional test plans.
• Platform level electrical characterization experience with processor I/O interfaces preferred.
• Experience and demonstrated expertise in debugging processor and PC platform I/O interfaces.
• Proficient with oscilloscopes, reading schematics and layout documentation, and MS Windows and Office.

Responsibilities

• Develop test plans and validate processor silicon interface features with focus on power management.
• Write comprehensive electrical and functional test plans for processor interface validation.
• Execute test plans for client processors using hardware and software validation tools, oscilloscopes, and logic analyzers.
• Debug electrical and functional issues for new processors.
• Provide input into platform definitions and review platform designs used in silicon validation.
• Provide technical guidance and training to less experienced engineers and technicians in planning, testing, and debugging processor validation.

Skills

Test plan development

Electrical validation

Debugging

Power management

Written communication

Oral communication

Education

Bachelors in Electrical Engineering or Computer Engineering

Masters degree (preferred)

Tools

Oscilloscopes

Logic analyzers

Schematic reading

MS Windows

Layout documentation reading

Job description

Job duties

• In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for new processor silicon interface features with strong focus on power management.
• Writes comprehensive electrical & functional test plans for the processor interface validation of processors.
• Executes electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes, & logic analyzers.
• Debug of electrical & functional issues for new processors.
• Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors.
• Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug processor validation.

Job duties

• In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for new processor silicon interface features with strong focus on power management.
• Writes comprehensive electrical & functional test plans for the processor interface validation of processors.
• Executes electrical & functional test plans for client processors using hardware & software validation tools, oscilloscopes, & logic analyzers.
• Debug of electrical & functional issues for new processors.
• Provides detailed input into the platform definition & review of platform designs used in the silicon validation of new processors.
• Provides technical guidance and training to less experienced engineers and technicians in the planning, test, & debug processor validation.

Experience and Education

• Bachelors in Electrical Engineering or Computer Engineering with 2-4 years of related experience
• Masters plus at least 2+ years directly related experience (an advanced degree will be considered a plus)
• Requires experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans
• Platform level electrical characterization experience with processor I/O interfaces is considered, preferred
• Requires experience and demonstrated technical expertise in the debug of processor & PC platform I/O interfaces.
• Demonstrated experience with or knowledge using oscilloscopes, reading schematics and layout documentation, and MS Windows and Office applications
• Requires good written and oral communication skills
• Demonstrate the ability to communicate with a variety of engineering disciplines and management.