Technical Manager, Physical Design Verification Lead (7264)

TSMC - Taiwan Semiconductor Manufacturing Company Limited; San Jose (CA); On-site; USD 153,000 - 230,000; Full time

Job summary

TSMC Technology Inc. seeks a seasoned Physical Design Verification Lead to drive end‑to‑end verification for CPU blocks toward production tapeouts on N7 or below tech nodes. You will partner with the STA team and lead ECOs for tight timing closure, while addressing EM/Noise and Power/IR challenges.

You will supervise CTS and P&R strategies, optimize block floorplans, and mentor junior engineers, delivering silicon‑quality results at a customer site in the South Bay area.

Qualifications

• Master’s degree in Electrical, Computer Engineering, or Computer Science.
• 10–20 years in physical implementation and verification roles.
• Experience with EDA tools (Innovus/ICC2, Calibre) and design flows.
• Proven chip integration and sign‑off experience.

Responsibilities

• Lead end‑to‑end physical design verification for CPU blocks to tapeout.
• Collaborate with the STA team to implement ECOs for timing closure.
• Analyze and resolve Signal EM/Noise and Power/IR issues.
• Manage DRC, LVS, ERC and Antenna verifications and cleanups.
• Achieve final physical verification sign‑off across design metrics.
• Oversee CTS implementation and advanced P&R strategies.
• Optimize floorplans and design partitioning for quality.
• Provide technical leadership and mentorship to juniors.

Skills

EDA tools

Physical design verification

Scripting (TCL/Perl/Python)

Education

Master’s degree in Electrical/Computer Engineering or CS

Tools

Innovus/ICC2

Calibre

Job description

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Technical Manager, Physical Design Verification Lead (7264)

Overview of Role
TSMC Technology Inc. is at the forefront of semiconductor innovation, delivering cutting-edge solutions that power the next generation of technology. We are seeking a highly experienced and motivated Physical Design Verification Lead to join our dynamic team, working closely with a key customer on advanced designs in N2P/A14 technology nodes. This is an exceptional opportunity to drive critical verification efforts on state-of-the-art technology nodes and contribute to successful production tapeouts.

Responsibilities
As a Physical Design Verification Lead, you will be a pivotal member of our team, responsible for ensuring the robust physical integrity and performance of high-performance chip designs. You will lead comprehensive physical verification efforts from block-level implementation through to final production tapeout, playing a crucial role in achieving silicon success. Your expertise will directly impact the quality and reliability of our advanced products.

• Lead and executeend-to-end physical design verification for CPU blocks, culminating in successful production chip tapeouts.
• Collaborate closely with the STA teamto implement Engineering Change Orders (ECOs) for critical timing closure.
• Perform in-depth analysis and resolutionof Signal EM/Noise and Power IR/EM issues.
• Manage comprehensive analysis and cleanupfor all physical verification checks, including DRC, LVS, ERC, and Antenna violations.
• Achieve final physical verification sign-offacross all design metrics.
• Oversee the implementationof customized Clock Tree Structures (CTS) and advanced Place & Route strategies.
• Optimize block-level floorplans, meticulously analyzing and ensuring high-quality design partitioning.
• Provide technical leadership and mentorshipto junior engineers.

Minimum Qualifications

• Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
• 10-20 years of hands-on experience in physical implementation and verification roles.
• Demonstrated expertisewith major Electronic Design Automation (EDA) tools (e.g., Innovus/ICC2, Calibre) and established design flows.
• Extensive experiencein chip integration and sign-off procedures.
• Proven experience with advanced technology nodes, specifically TSMC N7 or below.
• Proficiency in scripting languages, particularly TCL, Perl, and Python, for automation and flow enhancement.
• Ability and willingness to work full-time at a customer site located in the South Bay area.

Preferred Qualifications

• Direct experiencewith TSMC N2 technology nodes.
• In-depth knowledgeof CPU implementation methodologies.
• Expertise in advanced timing sign-off methodologiesand techniques.
• A strong track recordof successful production tapeouts for multi-million gate designs.
• Prior experience leading physical verification efforts or small teams.

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.

In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC Technology Inc. obtaining any export license or other approval that may be required by the U.S. Government.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at [e-mail] . TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.

Pay Transparency / Benefits statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $153,000 and $230,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.