Systems Engineer, Digital Payload

Viasat; Tempe (AZ); On-site; USD 181,000 - 285,000; Full time

Job summary

Viasat is seeking an experienced Digital Payload Systems Engineer to provide technical leadership for complex digital space systems. You will own end-to-end digital payload architecture, performance, requirements, budgets, verification, and long-term evolution.

The role calls for senior technical authority across FPGA/ASIC-based systems, with mentoring responsibilities and cross-functional collaboration. This site-based role requires 60%+ in-office presence.

Qualifications

• Minimum 8+ years in systems engineering for space or mission-critical systems.
• Experience owning payload or system-level technical budgets for performance and risk.
• Strong requirements development, decomposition, and verification closure.
• Ability to influence across teams without direct authority.

Responsibilities

• Own end-to-end digital payload architecture and performance.
• Lead architecture definition and trade studies for FPGA/ASIC/ DSP systems.
• Define system-level verification strategies with cross-functional teams.
• Manage technical budgets, margins, risks, and design tradeoffs.
• Develop artifacts like SRDs, TRDs, and interface specifications.
• Lead requirements traceability and lifecycle reviews (SRR, PDR, CDR).
• Mentor engineers and advance digital payload development practices.
• Communicate recommendations to leadership with clear tradeoffs.

Skills

Systems engineering

Technical leadership

Communication skills

Mentoring engineers

Problem solving

Ambiguity resolution

Education

Bachelor's degree in Engineering/Physics/EE/related field

Tools

VHDL

Verilog

SystemVerilog

Job description

About us

One team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.

What you’ll do

We are seeking an experienced Digital Payload Systems Engineer to provide technical leadership for complex digital space systems. This role owns end-to-end digital payload architecture, system performance, requirements, technical budgets, verification strategy, and long-term payload evolution.

The successful candidate will serve as a senior technical authority across FPGA and ASIC based digital systems, independently defining complex problems, driving architecture decisions, coordinating cross-functional execution, and mentoring other engineers. This role requires deep subject matter expertise, strong systems judgment, and the ability to influence technical outcomes across programs without direct authority.

This is a site‑based role, employees work 3+ days (60%+) per week from a Viasat office or work location within a standard five‑day workweek.

The day‑to‑day

• Own end‑to‑end digital payload system performance, architecture, requirements, and verification strategy.
• Lead architecture definition and trade studies for FPGA, ASIC, DSP, high‑speed I/O, clocking, and payload processing systems.
• Define and resolve complex system‑level problems across hardware, firmware, software, RF, integration, and test teams.
• Drive design decisions for beamforming, channelization, regenerative payloads, and standards‑based implementations including DVB‑S2, DVB‑S2X, DVB‑RCS, and 3GPP.
• Own technical budgets, margin posture, assumptions, risks, and analytical models supporting program decisions.
• Develop and maintain key technical artifacts, including SRDs, TRDs, interface specifications, trade studies, and verification plans.
• Lead requirements decomposition, allocation, traceability, and burndown across subsystem teams.
• Support major lifecycle reviews including SRR, PDR, CDR, test readiness, and operational readiness reviews.
• Define system‑level verification and validation strategies with integration and test teams.
• Provide technical leadership on interfaces, timing, throughput, resource utilization, high‑speed data movement, and payload processing behavior.
• Communicate technical recommendations, risks, and tradeoffs to engineering and program leadership.
• Mentor engineers and help improve systems engineering practices, standards, and digital payload development processes.

What you’ll need

• Bachelor’s degree in Engineering, Physics, Computer Engineering, Electrical Engineering, or related technical field, or equivalent experience.
• 8+ years of relevant experience in systems engineering, digital payload development, FPGA or ASIC based systems, aerospace, space, or mission‑critical systems.
• Demonstrated ability to independently define ambiguous technical problems, select appropriate methods, and drive resolution across teams.
• Proven experience owning payload or system‑level technical budgets for performance, latency, throughput, power, timing, resources, margin, and risk.
• Deep experience with requirements development, decomposition, allocation, traceability, and verification closure.
• Strong understanding of full lifecycle systems engineering from concept definition through integration, verification, and operational readiness.
• Significant FPGA and ASIC architecture or implementation experience.
• Strong technical foundation in DSP, communication systems, high‑speed digital interfaces, and payload data path architecture.
• Proficiency with VHDL, Verilog, SystemVerilog, or equivalent hardware description languages.
• Deep understanding of SERDES, transceivers, clocking architectures, synchronization, timing closure, high‑speed link bring‑up, and lab debugging.
• Ability to influence technical outcomes across multidisciplinary teams without direct authority.
• Strong communication skills for senior‑level design reviews, risk discussions, and technical decision forums.
• Experience mentoring engineers and improving technical practices across a team or organization.

What will help you on the job

• Experience with satellite payload architectures, digital transparent processors, regenerative payloads, or onboard processing systems.
• Familiarity with beamforming, channelizers, modem architectures, waveform processing, packet processing, or high‑throughput satellite systems.
• Familiarity with DVB‑S2, DVB‑S2X, DVB‑RCS, 3GPP, or related communication standards.
• Experience with MBSE, requirements management tools, architectural modeling, or digital engineering environments.
• Background in high‑reliability, radiation‑tolerant, mission‑critical, or space‑qualified systems.
• Ability to balance technical rigor with cost, schedule, risk, reuse, manufacturability, and verification constraints.
• Track record of contributing to technical strategy, roadmap development, design standards, or reusable architectures.

Salary range

$180,500.00 - $285,000.00 / annually. For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $224,500.00- $336,500.00/ annually

EEO Statement

Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic.