System/Software Engineer (Chip Development)

Fuse Engineering; Fort Meade (MD); On-site; USD 100,000 - 130,000; Full time

Job summary

Fuse Engineering, located in Fort Meade, Maryland, is seeking a skilled Systems Engineer to support the design and testing of complex digital systems. The role requires hands-on experience in VHDL-based chip development and involves bridging high-level system requirements with hardware implementation.

Responsibilities include analyzing system requirements, designing digital hardware, and collaborating with teams. A TS SCI with Polygraph Clearance is mandatory, along with strong expertise in FPGA or ASIC development processes.

Qualifications

• TS SCI with Polygraph Clearance required.
• Strong experience in digital system design using VHDL.
• Demonstrated expertise in FPGA or ASIC development processes.

Responsibilities

• Analyze system requirements and translate them into hardware architecture.
• Design, develop, and verify digital hardware using VHDL.
• Conduct simulations, synthesis, and timing analysis.

Skills

VHDL-based chip development

Digital system design

FPGA or ASIC development

Integration across platforms

Clearance TS SCI with Polygraph

Tools

ModelSim

Synopsys

Xilinx Vivado

Job description

We are looking for a skilled Systems Engineer with hands‑on experience in VHDL‑based chip development to support the design, integration, and testing of complex digital systems. This role bridges the gap between high‑level system requirements and detailed hardware implementation, contributing to end‑to‑end development of custom digital solutions.

Key Responsibilities

• Analyze system requirements and translate them into hardware architecture and specifications.
• Design, develop, and verify digital hardware using VHDL.
• Collaborate with hardware and software teams to ensure seamless integration across platforms.
• Conduct simulations, synthesis, and timing analysis to validate design functionality and performance.
• Support hardware bring‑up, debugging, and system‑level testing.

Requirements

• TS SCI with Polygraph Clearance required.
• Strong experience in digital system design using VHDL.
• Demonstrated expertise in FPGA or ASIC development processes.
• Familiarity with simulation tools such as ModelSim and synthesis tools (Synopsys, Xilinx Vivado).
• Ability to work from system‑level requirements to detailed design and implementation.

Preferred Qualifications

• Experience with Verilog and mixed‑language design environments.
• Background in embedded systems or system‑on‑chip (SoC) design.
• Familiarity with industry‑standard protocols (SPI, I2C, UART, Ethernet).
• Exposure to system‑level tools such as MATLAB, Simulink, or scripting languages (Python, TCL).