Staff Verification Architect, HBM & 3D-IC AI/ML

Micron Technology, Inc; Richardson (TX); On-site; USD 145,000 - 195,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid time off

Paid holidays

Benefits guide

Job summary

Micron Technology, Inc. is seeking a Staff Verification Architect to shape modular, scalable verification solutions for next-generation HBM DRAM products across multiple customer platforms. You will collaborate with design, product engineering, business units, and external teams to ensure the roadmap's success.

The role emphasizes testbench architecture, 2.5D/3D package integration, and pre-/post-silicon issue analysis with AI-assisted approaches to improve cycle time and quality.

Qualifications

• Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or related field.
• Experience defining and driving verification strategies for complex projects.
• Strong verbal and written communication skills.

Responsibilities

• Deliver high-quality verification plans and architecture collateral across IP- and SoC-level verification.
• Drive co-verification through direct customer interactions and mentor early-career engineers.
• Build verification methodology improvements and GenAI applications aligned to HBM design cycles.
• Debug and identify root causes for pre-silicon and post-silicon issues in HBM products.

Skills

Verilog

FastSpice

Co-simulation

Real number modeling

Verification strategy

Education

B.S. in Electrical/Computer Engineering or related

Master's degree (preferred)

Tools

RTL verification flows

Schematic-based verification

Job description

Micron Technology, Inc. is seeking a Staff Verification Architect to shape modular, scalable verification solutions for next-generation HBM DRAM products across multiple customer platforms. You will collaborate with design, product engineering, business units, and external teams to ensure the roadmap's success.

The role emphasizes testbench architecture, 2.5D/3D package integration, and pre-/post-silicon issue analysis with AI-assisted approaches to improve cycle time and quality.