Staff TPU Co-Design Engineer - Architecture & Performance

Socket.dev; Sunnyvale (CA); On-site; USD 192,000 - 278,000; Full time

Job summary

Google is seeking a Staff Co-Design Engineer to shape the TPU architecture and accelerate AI/ML hardware. You will drive silicon solutions powering world-class models and work across AI research and engineering to push the performance and efficiency of TPU-based systems.

As part of the TPU Architecture team, you will bridge ML model innovations and next-generation hardware design, influencing the roadmap for training and serving at scale and collaborating with partners to deliver

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.
• 10 years of experience in computer architecture, chip architecture, or hardware-software co-design.
• Experience developing systems for performance modeling, simulation, or system analysis.

Responsibilities

• Drive the definition and optimization of the hardware/software stack to enable performant training and serving of large ML models.
• Collaborate with research and modeling teams to innovate on model architectures, focusing on scaling, quality, and their direct impact on hardware performance.
• Lead the development of configurable architectural simulators and cycle-accurate performance models to quantify microarchitectural optimizations and evaluate architectural decisions.
• Conduct system-level performance analysis across highly distributed ML systems, innovating new methodologies to balance compute, memory bandwidth, and inter-chip network requirements.
• Engage with partners across hardware design, compiler development, and ML research to transition architectural innovations from concept to production.

Skills

Architecture experience (10+ years)

Performance modeling

Education

Bachelor's degree or equivalent

Job description

Google is seeking a Staff Co-Design Engineer to shape the TPU architecture and accelerate AI/ML hardware. You will drive silicon solutions powering world-class models and work across AI research and engineering to push the performance and efficiency of TPU-based systems.

As part of the TPU Architecture team, you will bridge ML model innovations and next-generation hardware design, influencing the roadmap for training and serving at scale and collaborating with partners to deliver