Staff SoC RTL Engineer

QUADRIC PTY LTD; Burlingame (CA); On-site; USD 170,000 - 230,000; Full time

Benefits offered by this job

Medical/Dental/Vision Insurance

Company-paid Life Insurance

Flex PTO

401(k) Retirement Plan

Catered lunch daily

Downtown Burlingame office

Equity with the business

Parental Leave

Caltrain/parking reimbursement

Job summary

Quadric, based in Burlingame, CA, is redefining edge AI with its GPNPU and invites a Staff SoC RTL Engineer to shape the architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring the next-generation platform to life.

In this role you will contribute across all design stages, ensure timing closure, and package releases for customer evaluation. 5+ years in SoC/ASIC front-end is required.

Qualifications

• BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
• Proficiency in SystemVerilog or Verilog.
• Strong background in computer architecture, low-power digital design techniques, and deep technical knowledge in at least one subsystem (Memory, I/O, or Compute).
• Proven experience with SoC subsystems (including 3rd-party IP) and working knowledge of VCS & Verilog/C Co-Simulation.

Responsibilities

• Own SoC-level subsystem development and seamless integration with third-party IP (such as NoC, PCIe/UCIe interfaces, DDR, Security, etc.).
• Contribute directly to the definition of the SoC architecture by deeply understanding its application requirements.
• Package designs for customer releases and rapidly iterate based on customer feedback.
• Own Power, Performance, and Area (PPA) optimization strategies at the SoC level.
• Apply low-power digital design techniques to optimize hardware efficiency.
• Contribute to timing closure across the full product lifecycle, spanning front-end, back-end, and final tapeout stages.
• Balance single-stream latency against scaled throughput performance.

Skills

SystemVerilog

Verilog

SoC Architecture

IP Integration

VCS

Low-power Design

Front-end Design

Education

BS/MS/PhD in Electrical or Computer Engineering

Tools

VCS

Verilog Co-Simulation

NoC/PCIe/IP Integration

FPGA Tools

Job description

Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems.

Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world's first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow's technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.

The Opportunity

Quadric is building a revolutionary new processor-based SoC architecture. As a Staff SoC RTL Engineer, you will get in on the ground floor as a key member of our chip design team, contributing across all stages of the SoC design and integration cycle. In this role, you will help define the SoC architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring our next-generation platform to life.

What You'll Do

SoC Subsystem Development & IP Integration

• Own SoC-level subsystem development and seamless integration with third-party IP (such as NoC, PCIe/UCIe interfaces, DDR, Security, etc.).
• Contribute directly to the definition of the SoC architecture by deeply understanding its application requirements.
• Package designs for customer releases and rapidly iterate based on customer feedback.

PPA Optimization & Timing Closure

• Own Power, Performance, and Area (PPA) optimization strategies at the SoC level.
• Apply low-power digital design techniques to optimize hardware efficiency.
• Contribute to timing closure across the full product lifecycle, spanning front-end, back-end, and final tapeout stages.

• Balance single-stream latency against scaled throughput performance.

What Success Looks Like

Within your first 6-12 months, you'll:

• Independently own SoC subsystem development and drive measurable PPA improvements.
• Develop an in-depth understanding of the architecture and software interfaces, enabling you to debug complex issues across the full SW/HW stack.
• Successfully package and deliver design releases for customer evaluation and integration.

What We're Looking For

Required

• BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
• Proficiency in SystemVerilog or Verilog.
• Strong background in computer architecture, low-power digital design techniques, and deep technical knowledge in at least one subsystem (Memory, I/O, or Compute).
• Proven experience with SoC subsystems (including 3rd-party IP) and working knowledge of VCS & Verilog/C Co-Simulation.

Preferred

• Experience in logic synthesis and performance modeling.
• Experience in FPGA design.
• Familiarity with automotive safety standards (ASIL) and hardware security standards.

What We Offer

The base salary range for this position is $170,000 to $230,000. This range reflects the full span of levels and geographies at which Quadric hires for this role. The actual base salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies, the criticality of the role to the business, internal equity, and work location.

In addition to a competitive salary, we offer a variety of benefits to support your needs. The benefits below reflect our US-based offerings; for roles in other locations, benefits vary and are shared during the hiring process.

• Medical, dental, and vision insurance from day one - Premiums covered at 99% for Employees
• Company-paid life Insurance
• Voluntary supplemental life insurance
• STD + LTD insurance
• Commuter support including parking or Caltrain reimbursement. Our office is conveniently located within walking distance of the Caltrain station
• FSA + HSA
• Equity with the business
• Paid Parental Leave
• 401(k) Retirement Plan
• Flexible PTO
• Winter holiday shutdown
• Catered lunch each day in our office
• Downtown Burlingame office location, close to shops, cafes, and local amenities
• Collaborative, low-ego culture with significant ownership and impact
• A work culture focused on innovative disruption

Equal Employment Opportunity

Quadric is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, sexual orientation, gender identity, marital status, medical condition, or any other characteristic protected by applicable federal, state, or local law

E-Verify and Right to Work Notices

Quadric participates in the E-Verify program to confirm employment eligibility for U.S.-based roles. As part of this process, applicants may review the following notices, which explain your rights and our participation in E-Verify. These notices are provided in English and Spanish.

• E-Verify Participation Notice (English | Spanish)
• Right to Work Notice (English | Spanish)

No action is required from candidates during the application process. These notices are provided for informational purposes only.

Privacy

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