Staff Process Integration Engineer

ovt

Santa Clara (CA)

On-site

USD 157,000 - 160,000

Full time

14 days+
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Job summary

ovt in California seeks an experienced CIS process engineer to develop and optimize CMOS image sensor processes, balancing performance targets with schedule and budget.

You will collaborate with foundry partners to define and improve CIS silicon, color and packaging flows, and support production and design teams to boost yield and sensor performance for mass production.

Qualifications

  • Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Two years of experience in developing and fabricating semiconductor devices.
  • Experience designing and managing experimental splits to meet performance targets.
  • Photolithography and microfabrication techniques in a clean room environment.
  • Semiconductor device testing including SEM, TEM, AFM and spectroscopy.
  • Defining project roadmaps, performance targets, and schedules.

Responsibilities

  • Develop advanced CIS process to meet performance targets on schedule and within budget.
  • Collaborate with foundry partners to define and improve CIS silicon, color and package processes.
  • Support production and design teams to improve yield and sensor performance for mass production.
  • Design and manage silicon split lots to achieve targets and enable future technologies.
  • Analyze large bench and wafer data; feed back to pixel and wafer split design to optimize performance.
  • Liaise between internal pixel design/characterization engineers and external foundry partners for clear communication.
  • Coordinate evaluation methods and equipment to improve testing efficiency and accuracy.
  • Track foundry technology improvements and implement fabrication processes to meet CIS targets.

Skills

CMOS CIS
Semiconductor fabrication
Data analysis
Technical communication
Team collaboration
Photolithography
RIE
SEM
TEM
AFM

Education

Master’s degree in Electrical Engineering or related field

Tools

SEM
TEM
AFM
Photolithography
RIE
UV-Vis spectroscopy

Job description

  • Develop advanced CMOS image sensor (CIS) process to meet performance targets under a defined schedule and budget.
  • Collaborate with foundry partners to define and improve the CIS silicon, color and package process for each CIS technology.
  • Provide support to production and design teams to improve yield and overall sensor performance, establishing process flow applicable to mass production.
  • Design and manage silicon split lots with respect to project goals and schedules to achieve performance targets, meet production requirements, and research and development of future technologies.
  • Analyze and interpret large volumes of bench and wafer level data; feedback to pixel and wafer split design to optimize design and improve performance.
  • Work in close collaboration with internal pixel design and characterization engineers, and external foundry partners; primary liaison between internal and external teams to drive effective technical communication and discussion.
  • Work with characterization engineers to analyze data and test results, provide feedback on evaluation methods and settings to improve testing efficiency and accuracy; coordinate evaluation schedule and equipment to enable testing.
  • Continuously track technology improvement and state of art developed by foundry; select and implement appropriate fabrication processes to meet CIS performance and yield targets; closely monitor lot processing and swiftly address/feedback any issues to foundry to mitigate product loss and schedule delay.
Requirements:
  • Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or a related field.
  • Two years of experience in developing and fabricating semiconductor devices.
  • Developing and fabricating semiconductor devices, including designing and managing experimental splits to achieve performance targets.
  • Photolithography and microfabrication techniques (electron beam, thermal deposition, sputtering, reactive ion etching) in a clean room environment.
  • Silicon and semiconductor device testing, including electron microscopy (SEM, TEM), atomic force microscopy (AFM), spectroscopy techniques (photo- and fluoro- luminescence, Fourier transform IR spectroscopy, UV-vis), and optical and electrical device characterization.
  • Defining project roadmaps, performance targets, and schedules.

Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Sr. Process Integration Engineer
Sr. Process Integration Engineer

ovt • Santa Clara (CA)

On-site
USD 121,000 - 155,000
Sr. Process Integration Engineer
Sr. Process Integration Engineer

OMNIVISION • Santa Clara (CA)

On-site
USD 120,600 - 160,000
Senior CIS Process Engineer — Device Physics & Yield
Senior CIS Process Engineer — Device Physics & Yield

ovt • Santa Clara (CA)

On-site
USD 121,000 - 155,000
Product Validation Engineer
Product Validation Engineer

OMNIVISION • Santa Clara (CA)

On-site
USD 120,182 - 125,000
Pixel Design Engineer – Process R&D
Pixel Design Engineer – Process R&D

OMNIVISION • Santa Clara (CA)

On-site
USD 140,000 - 170,000
Product Engineer
Product Engineer

OMNIVISION • Santa Clara (CA)

On-site
USD 80,000 - 120,000
Design Characterization Engineer
Design Characterization Engineer

ovt • Santa Clara (CA)

On-site
USD 111,000 - 140,000
Pixel Design Engineer – Process R&D
Pixel Design Engineer – Process R&D

ovt • Santa Clara (CA)

On-site
USD 140,000 - 170,000
Design Characterization Engineer
Design Characterization Engineer

ovt • Irvine (CA)

On-site
USD 111,000 - 140,000
Senior Staff Analog Design Engineer
Senior Staff Analog Design Engineer

OMNIVISION • Santa Clara (CA)

On-site
USD 186,472 - 220,000