Staff Layout Designer - Pathfinding

Micron Technology; Boise (ID); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology in Boise, Idaho, is seeking a Staff Layout Designer to develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices from schematics provided by design engineers.

You will verify data integrity, lead major block developments, mentor junior engineers, and collaborate across global TD, design, verification and CAD teams, driving innovation and automation in layout workflows.

Qualifications

• AS or Bachelor's in Electronics, Electrical Engineering, or related field with 10 years of layout design experience.
• Deep knowledge of EDA tools such as Cadence Virtuoso, Synopsys, and Calibre.
• Strong root-cause analysis and collaboration with engineering staff.
• Experience in layout, floorplanning, signal- and power-planning methodologies.
• Excellent verbal and written communication and understanding of design rules.

Responsibilities

• Organize and prioritize resources to meet deadlines.
• Lead major block developments and mentor juniors.
• Work in a globally distributed design environment.
• Contribute to layout efficiency through automation and new methods.
• Plan, assign resources, and ensure quality-controlled results.
• Collaborate with TD, design, verification, and CAD groups.

Skills

Layout leadership

Root-cause analysis

Effective communication

Layout optimization

Education

Bachelor's degree in Electronics or Electrical Engineering

Tools

Cadence Virtuoso

Synopsys

Calibre

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Develops and prepares multi-dimensional layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. May check design layouts and detailed drawings.

Position Overview

As a Staff Layout Designer, you will develop and prepare multi-dimensional layouts. You will provide detailed drawings of semiconductor devices from schematics and related geometry provided by design engineers, verify data integrity, and take the lead in major block developments. You’ll be expected to communicate effectively with other functional groups across global sites, e.g., TD, design, verification, and CAD. We’re seeking a self-starter who can learn rapidly and adapt quickly to changing priorities.

Responsibilities

• Organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution
• Contribute to group management and technical innovation
• Assign resources, schedule tasks, provide direction, and deliver quality-controlled results
• Contribute to projects in a globally distributed design/layout environment
• Effectively mentor junior team members
• Contribute to the improvement of layout efficiency through the development of automation and new methodologies; Lead, plan, and deliver major blocks and product revisions.

Minimum Qualifications

• AS or Bachelor's in Electronics, Electrical Engineering, or a related field plus 10 years of direct experience in semiconductor layout design
• Deep working knowledge of EDA tools ("i.e. Cadence Virtuoso, Synopsys, Calibre")
• Demonstrate a strong ability to debug problems through root-cause analysis, find effective and efficient solutions, and collaborate with the engineering staff
• Skilled in developing and applying custom layout, floor‑planning, signal-planning and power‑planning methodologies
• Strong verbal and written communication skills
• In-depth understanding of design rules and delivering quality layouts
• Strong physical verification analysis and debugging skills

Preferred Qualifications

• 10+ years direct experience in semiconductor layout design
• BS degree in a related field
• Project leadership in quality optimization, die size shrinkage
• IC layout design experience with NAND, DRAM and/or SRAM
• Programming skills and leveraging Artificial Intelligence (AI) to layout workflow

Benefits

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Equal Opportunity Employment

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.