Staff Layout Designer

Micron Technology; San Jose (CA); On-site; USD 99,187 - 168,067; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

Micron Technology, Inc is hiring a Staff Layout Designer in San Jose, California. The role involves developing multi-dimensional layouts for semiconductor devices, leading projects, and mentoring junior members. Ideal candidates will have extensive experience in semiconductor layout design and a strong background in EDA tools.

Compensation ranges from $72.00 to $122.00 per hour, alongside a robust benefits package including medical, dental, and paid time-off. Join us at Micron and contribute to innovative design processes!

Qualifications

• 10 years of direct experience in semiconductor layout design.
• Deep working knowledge of EDA tools like Cadence Virtuoso.
• Experience with debugging through root-cause analysis.

Responsibilities

• Organize logistics and resources for scheduled deadlines.
• Mentor junior team members effectively.
• Contribute to layout efficiency improvements.

Skills

Debugging through root-cause analysis

Collaboration with engineering staff

Communication skills

Physical verification analysis

Education

AS or AAS in Electronics or Electrical Engineering

BS degree in a related field

Tools

Cadence Virtuoso

Synopsys

Calibre

Job description

Position Overview

As a Staff Layout Designer, you will develop and prepare multi-dimensional layouts, provide detailed drawings of semiconductor devices from schematics and related geometry, verify data integrity, and take the lead in major block developments. You will communicate effectively with other functional groups across global sites (e.g., TD, design, verification, and CAD), learn rapidly, and adapt quickly to changing priorities.

Responsibilities

• Organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution
• Contribute to group management and technical innovation
• Assign resources, schedule tasks, provide direction, and deliver quality‑controlled results
• Contribute to projects in a globally distributed design/layout environment
• Effectively mentor junior team members
• Contribute to the improvement of layout efficiency through the development of automation and new methodologies; lead, plan, and deliver major blocks and product revisions

Minimum Qualifications

• AS or AAS in Electronics, Electrical Engineering, or a related field plus 10 years of direct experience in semiconductor layout design
• Deep working knowledge of EDA tools (e.g., Cadence Virtuoso, Synopsys, Calibre)
• Strong ability to debug problems through root‑cause analysis and collaborate with engineering staff
• Skilled in developing and applying custom layout, floor‑planning, signal‑planning, and power‑planning methodologies
• Strong verbal and written communication skills
• In‑depth understanding of design rules and delivering quality layouts
• Strong physical verification analysis and debugging skills

Preferred Qualifications

• 15+ years of direct experience in semiconductor layout design
• BS degree in a related field
• Project leadership in quality optimization, die size shrinkage
• IC layout design experience with NAND, DRAM, and/or SRAM
• Programming skills and AI experience relevant to layout workflow

Compensation

US base salary range: $72.00 – $122.00 per hour. Additional compensation may include benefits, bonuses, and equity. The pay scale is determined by role, level, and location and is subject to change based on business needs.

Benefits

Micron offers a choice of medical, dental, and vision plans, protection of income for illness or injury, paid family leave, a robust paid time‑off program, and paid holidays.

EEO Statement

Micron is proud to be an equal‑opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.