Staff Engineer, Physical Design

Samsung Electronics; Austin (TX); On-site; USD 151,000 - 227,000; Full time

Job summary

Samsung Electronics America, Inc. is seeking a Senior/Staff Physical Design Engineer to support physical design implementation for high-performance GPU IP at Samsung SARC/ACL in Austin.

You will contribute to floorplanning, placement, routing, and signoff across advanced nodes, collaborating with hardware and system teams to optimize PPA and reliability. The role emphasizes hands-on flow execution, scripting, and problem solving in a fast-paced, global environment, with opportunities for growth

Qualifications

• 6+ years of experience with a Bachelor’s Degree in Computer Science, Computer Engineering, or related field, or 4+ years of experience with a Master’s Degree, or 2+ years of experience with a Ph.D.
• 2+ years of hands-on experience with physical design implementation flows, including synthesis, place-and-route, timing closure, and signoff support.
• Proficiency with Synopsys or Cadence toolsets (e.g., ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC).
• Strong scripting and automation skills in Python, TCL, Shell, or Perl.
• Familiarity with low-power implementation considerations, physical verification tools (Calibre/ICV), and deep submicron design challenges.
• Strong analytical and debugging skills, attention to details, and problem-solving ability using data-driven approach for complex flow or design issues.
• Excellent collaboration and communication skills, with the ability to navigate ambiguity and maintain ownership in a fast-paced, global environment.

Responsibilities

• You will execute physical design implementation, assisting with floorplanning, placement, and routing of major GPU blocks to support system-level power, performance, and area (PPA) goals through synthesis-to-signoff flows.
• You will support timing, power, and physical signoff activities, assisting with STA-driven optimization, DRC/LVS convergence, and reliability considerations across GPU blocks.
• You will advance methodology and flow improvements, developing scripts and automation to enhance design productivity, debug tool issues, and improve repeatability across projects.
• You will proactively seek collaboration with cross-functional teams and vendors, helping adapt physical design flows with hardware and system-level teams for cutting-edge nodes while supporting triage and resolution of implementation challenges.
• You take initiatives on moderate-to-complex projects, communicating openly, documenting analysis and results, demonstrating strong ownership and continuous learning mindset by staying ahead of emerging GPU technologies and physical design implementation.

Skills

Physical design

Synthesis to signoff

Scripting: Python/TCL

Timing closure

Power/area optimization

Debugging skills

Collaboration skills

Education

Bachelor's degree in CS/CE or related field

Master's degree in related field

PhD in related field

Tools

Synopsys tools (ICC2/Fusion Compiler/Innovus)

Cadence tools (PrimeTime/Tempus, StarRC)

Job description

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!

Role and Responsibilities

As a Senior or Staff Physical Design Engineer, you will support the physical implementation and methodology execution of high-performance GPU IP, contributing to power, performance, and area (PPA) goals across advanced process nodes.

In this mid-level individual contributor role, you will help execute key stages of the physical design flow—from synthesis through floorplanning, timing closure, and signoff—while partnering closely with hardware and system-level teams. You bring curiosity and knowledge in hands‑on implementation skills, debugging ability, and a collaborative mindset to help improve flows and deliver high-quality design outcomes.

• You help execute physical design implementation, assisting with floorplanning, placement, and routing of major GPU blocks to support system-level power, performance, and area (PPA) goals through synthesis-to-signoff flows.


• You support timing, power, and physical signoff activities, assisting with STA-driven optimization, DRC/LVS convergence, and reliability considerations across GPU blocks.


• You help advancing methodology and flow improvements, developing scripts and automation to enhance design productivity, debug tool issues, and improve repeatability across projects.


• You proactively seek collaboration with cross‑functional teams and vendors, helping adapt physical design flows with hardware and system‑level teams for cutting‑edge nodes while supporting triage and resolution of implementation challenges.


• You take initiatives on moderate‑to‑complex projects, communicating openly, documenting analysis and results, demonstrating strong ownership and continuous learning mindset by staying ahead of emerging GPU technologies and physical design implementation.

Skills and Qualifications

• 6+ years of experience with a Bachelor’s Degree in Computer Science, Computer Engineering, or related field, or 4+ years of experience with a Master’s Degree, or 2+ years of experience with a Ph.D.


• 2+ years of hands‑on experience with physical design implementation flows, including synthesis, place‑and‑route, timing closure, and signoff support.


• Proficiency with Synopsys or Cadence toolsets (e.g., ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC).


• Strong scripting and automation skills in Python, TCL, Shell, or Perl.


• Familiarity with low‑power implementation considerations, physical verification tools (Calibre/ICV), and deep submicron design challenges.


• Strong analytical and debugging skills, attention to details, and problem‑solving ability using data‑driven approach for complex flow or design issues.


• Excellent collaboration and communication skills, with the ability to navigate ambiguity and maintain ownership in a fast‑paced, global environment.

Our Team

The Advanced Design Technology and Design Implementation teams play a critical role in enabling GPU and system‑level development within Samsung SARC/ACL and the broader System LSI organization. Operating at the intersection of design technology and physical implementation, we partner closely with Foundry from early technology exploration through the full development cycle. Spanning advanced design methodologies, GPU physical design, CAD, and DTCO, we accelerate adoption of leading technology nodes and deliver optimized power, performance, area (PPA), silicon quality, and turnaround time for next‑generation IP solutions.

You will join a highly collaborative, fast‑paced environment working across parallel development cycles with direct impact on consumer technologies used worldwide. Here, you’ll help build what’s next: experimenting with new ideas, broadening your technical expertise, and solving impactful challenges alongside talented teammates who value ownership, continuous learning, and growth.

Total Rewards

At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $151,000 and $226,600. Your actualbase pay will depend on variables that may includeyour educationskills, qualifications, experience, and worklocation.

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full‑time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

Trade Secrets

By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

U.S. Export Control

This rolemayrequireaccess to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

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Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.