Staff Engineer: Global Front-End Layout & Fab Planning

Micron Technology, Inc

Boise (ID)

On-site

USD 90,000 - 120,000

Full time

14 days+

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Benefits offered by this job

Medical, dental and vision plans
Paid family leave
Robust paid time-off program

Job summary

Micron Technology, Inc in Boise, ID is seeking a motivated Staff Engineer for Front End Global Planning Layout. This role involves enhancing manufacturing capabilities through innovative design solutions and involves direct collaboration with various teams to optimize layout planning technologies.

The ideal candidate will possess 7+ years of experience in the semiconductor industry, particularly in fab layout and industrial engineering. Comprehensive benefits and opportunities for professional development are provided.

Qualifications

  • Bachelor's degree or equivalent experience in Industrial Engineering.
  • 7+ years of experience in the semiconductor industry, focusing on fab layout.
  • 5+ years experience with Greenfield/Brownfield fab design.
  • 5+ years experience using Autodesk AutoCAD in a semiconductor environment.
  • 3+ years experience collaborating across multi-functional teams.

Responsibilities

  • Partner with teams to enhance manufacturing capabilities through fab design.
  • Transition from 2D to 3D CAD systems across sites.
  • Author documentation for standard operating procedures and metrics.
  • Collaborate with suppliers to gather insights and enhance performance.
  • Optimize layout designs for space utilization.

Skills

Industrial Engineering
Fab layout expertise
Collaboration
Autodesk AutoCAD
Navisworks
Inventor
Revit

Education

Bachelor's degree in Industrial Engineering
Master's degree in Industrial Engineering

Tools

Autodesk AutoCAD
Navisworks
Inventor
Revit

Job description

Micron Technology, Inc in Boise, ID is seeking a motivated Staff Engineer for Front End Global Planning Layout. This role involves enhancing manufacturing capabilities through innovative design solutions and involves direct collaboration with various teams to optimize layout planning technologies.

The ideal candidate will possess 7+ years of experience in the semiconductor industry, particularly in fab layout and industrial engineering. Comprehensive benefits and opportunities for professional development are provided.

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