Staff Design Engineer

1000 Micron Technology, Inc.; San Jose (CA); On-site; USD 145,000 - 246,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

1000 Micron Technology, Inc. seeks a Staff Design Engineer located in San Jose, California, to design and analyze digital circuits for memory product development.

This role focuses on NAND interfaces and performance optimization, requiring a Bachelor's degree in Computer or Electrical Engineering and at least 7 years of design experience. The compensation package ranges from $145,000 to $246,000 per year, complemented by various benefits.

Qualifications

• 7+ years of experience in digital circuit design and development.
• Proven track record meeting performance, area, and power targets.
• Strong collaboration skills with multi-functional teams.

Responsibilities

• Interpret device and system specifications to deliver functionalities.
• Conceive and develop new circuits and define specifications.
• Support creation of schematics and/or RTL blocks.
• Define design verification best practices within the department.
• Perform RTL and gate-level verification at various levels.
• Facilitate netlist bring-up for basic functionality.
• Deliver design simulations and validate behavior in Verilog.
• Collaborate on validation plans and review silicon results.
• Assist in silicon design validation and tape-out revisions.

Skills

Digital circuit design

RTL and gate-level verification

Collaboration with multi-functional teams

Education

Bachelor’s degree in Computer Engineering or Electrical Engineering

Job description

Job Summary

Micron Technology seeks a Staff Design Engineer to design and analyze digital circuits for memory product development, focusing on NAND interfaces and performance optimization.

Responsibilities

• Interpret device and system specifications to deliver required functionalities.
• Conceive and develop new circuits, defining composition architecture specifications for new features.
• Support the creation of schematics and/or RTL blocks.
• Define design and verification best practices and communicate them within the department.
• Perform RTL and gate‑level verification at block, subsystem, and full‑chip levels.
• Facilitate netlist bring‑up to achieve basic functionality.
• Deliver design simulations, including post‑layout verification plans for new and existing features, and validate behavior in Verilog.
• Collaborate with Product Engineering on validation plans and review silicon results.
• Assist in silicon design validation, reticle experiments, qualification, and tape‑out revisions as needed.

Qualifications

Minimum Qualifications

• Bachelor’s degree in Computer Engineering or Electrical Engineering.
• 7+ years of experience in digital circuit design and development.
• Proven track record meeting performance, area, and power targets.
• Experience with RTL and gate‑level verification processes.
• Strong collaboration skills with multi‑functional teams.

Preferred Qualifications

• Master’s degree or Ph.D. in Computer Engineering or Electrical Engineering.
• Experience in technical leadership or project management roles.
• Knowledge of non‑volatile memory technologies, especially NAND.
• Familiarity with building architecture and verification guidelines.
• Excellent documentation and training skills.

Compensation & Benefits

US base salary range: $145,000.00 – $246,000.00 per year. Additional compensation may include benefits, bonuses, and equity. Micron offers medical, dental, and vision plans, income protection, paid family leave, a robust paid time‑off program, and paid holidays.

Equal Opportunity & Employment

Micron is a proud equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable laws.