Staff Analog/RF IC Layout Engineer

Skyworks Solutions, Inc.; Colorado; On-site; USD 109,000 - 227,000; Full time

Job summary

Skyworks Solutions, Inc. is seeking an experienced IC layout engineer to design analog and RF layouts, verify circuit performance, and collaborate with design teams on full-chip integration.

The position requires an Associate's Degree in electronic/IC layout CAD with 10+ years of IC layout experience and proficiency with Cadence and Mentor verification tools. It offers competitive pay and comprehensive benefits, with opportunities for global collaboration.

Qualifications

• Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience.
• Ability to layout analog circuitry in a size/time constrained environment.
• Understand layout techniques such as common centroid, matching, isolation, and the use of dummy devices.
• Ability to solve design problems using technical skills, intuition, and creativity.
• Proficiency in floorplanning and assembly from block to full chip level.
• Working knowledge of Cadence and Mentor Verification tools.
• Strong LVS troubleshooting and debug skills.
• Demonstrated ability to work individually and in a team-orientated environment.

Responsibilities

• Work closely with design engineers to ensure proper circuit performance.
• Design analog and RF layout.
• Understand device matching techniques.
• Excellent teamwork skills, including written and verbal communications, with both local and remote design teams.
• Exceptional layout planning and integration skills from small block to full chip.

Skills

Analog layout

Floorplanning

LVS debugging

Teamwork

Education

Associates Degree in Electronic/IC layout CAD specialization or related program

BSEE/BS Engineering Technology or related program

Tools

Cadence

Mentor Verification tools

Job description

Skyworks Solutions, Inc. is seeking an experienced IC layout engineer to design analog and RF layouts, verify circuit performance, and collaborate with design teams on full-chip integration.

The position requires an Associate's Degree in electronic/IC layout CAD with 10+ years of IC layout experience and proficiency with Cadence and Mentor verification tools. It offers competitive pay and comprehensive benefits, with opportunities for global collaboration.