Sr Staff Analog/Mixed Signal Design Engineer

Ursus; San Jose (CA); On-site; USD 200,000 - 250,000; Full time

Job summary

A multinational electronics company is seeking a Sr Staff Analog/Mixed Signal Design Engineer in San Jose, CA. The role involves designing and optimizing circuits for high-speed interconnect transceivers (Serdes) and requires extensive experience in RF and analog design. Candidates should have a strong educational background, preferably with an MS or Ph.D., and over 7 years of relevant industry experience.

Benefits

Medical benefits

Dental benefits

Vision benefits

401K with company matching

Qualifications

• Minimum 7+ years of RF/Analog/Serdes SoC design experience.
• Knowledge of analog and mixed-signal circuits such as bandgap and LDO.
• Experience with circuits for Serdes IPs: CTLE, DFE, FFE.

Responsibilities

• Actively work on architecture and design of high-speed interconnect transceiver (Serdes).
• Design and optimize circuits to meet specifications.
• Participate in silicon bring-up, validation, and debug.

Skills

RF Design

Analog Design

Mixed-Signal Design

High-Speed Interconnect

Scripting (Python, Matlab)

Education

MS or PhD in relevant field

Tools

Cadence

Spectre

Totem

EMX

Job description

JOB TITLE: Sr Staff Analog/Mixed Signal Design Engineer
LOCATION: San Jose, CA
DURATION: 1 year
PAY RATE: $95-$150/hr

COMPANY:
Our client, a multinational electronics company is recruiting for a Sr Staff Analog/Mixed Signal Design Engineer. If you meet the qualifications listed, please Apply Now!

Description
Sr. Staff Analog/Mixed Signal Design Engineer, you will actively work on architecture and design of high-speed interconnect transceiver (Serdes).

• You will work on circuits for Serdes IPs, Clock generation as well as traditional analog circuits.
• Design/optimize the circuit to meet specification
• Floor planning and layout supervision
• Participate in silicon bring-up, validation and debug.
• Contribute in architecture and specs

Requirements:

• MS (Ph.D, preferred) or similar background/experience
• Minimum 7+ yrs experience RF/Analog/Serdes SoC design experience.
• Knowledge and experience with analog circuits/mixed-signal circuits: such as bandgap, LDO, filters.
• Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation.
• Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe)
• Knowledge and experience with ESD, PLL, clock generation, Client, DAC is a big plus.
• Well-versed in EDA tools (Cadence, Spectre, Totem, EMX) Comfortable with scripting languages (Python, Matlab)

BENEFITS SUMMARY: Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate or annual salary only, unless otherwise stated. In addition to base compensation, full-time roles are eligible for Medical, Dental, Vision, Commuter and 401K benefits with company matching.

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