Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware

Amazon Web Services (AWS); Austin (TX); On-site; USD 90,000 - 150,000; Full time

Job summary

An innovative company is seeking a Senior Signal Integrity/Power Integrity Engineer to define and validate next-gen machine learning ASICs. In this pivotal role, you'll conduct high-speed simulations and optimize PCB layouts to ensure signal integrity across complex designs. Collaborating with hardware design teams, you'll tackle challenges in high-speed interfaces and clock distribution. This position offers a unique opportunity to work at the forefront of technology in a dynamic environment that values diversity and encourages career growth.

Qualifications

• Deep understanding of SI concepts and strong analytical skills.
• Hands-on experience with simulation tools like ADS, MATLAB, Cadence, HFSS.

Responsibilities

• Perform high-speed channel simulations to ensure signal integrity.
• Conduct SI/PI analysis to optimize PCB layouts, minimizing losses.

Skills

Signal Integrity (SI)

Power Integrity (PI)

High-speed channel simulations

Analytical skills

PCIe protocols

PCB layout

Tools

ADS

MATLAB

Cadence

HFSS

Job description

Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware

Join to apply for the Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware role at Amazon Web Services (AWS)

We are seeking a Senior SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design, and validation of AWS's next-generation machine learning ASICs. As a senior member of our hardware team, you will participate in the design and execution of all SI related topics, aiming to create customized platforms that integrate into AWS datacenters' cutting-edge technology.

Responsibilities include:

• Perform high-speed channel simulations to ensure signal integrity across complex designs.
• Conduct SI/PI analysis to optimize PCB layouts, minimizing losses and signal degradation.
• Utilize simulation tools such as ADS, MATLAB, Cadence, HFSS, among others, for performance evaluation and troubleshooting.
• Work with PCIe protocols and equalization techniques (DFE, CTLE, FFE) to enhance high-speed interfaces.
• Analyze clock distribution and jitter to ensure proper signal timing and integrity.
• Collaborate with PCB layout and hardware design teams on stack-up definitions and trade-offs for manufacturing and performance.
• Identify and resolve PCB manufacturing issues to ensure high yield and reliability.
• Partner with cross-functional teams to align on requirements and trade-offs.

Qualifications:

Basic:

• Deep understanding of SI concepts and strong analytical skills.
• Hands-on experience with simulation tools like ADS, MATLAB, Cadence, HFSS.
• Proficiency in high-speed channel simulations and system-level modeling.
• Experience with PCIe protocols and equalization techniques.
• Knowledge of clock distribution and jitter analysis.
• Expertise in PCB layout and manufacturing processes.

Preferred:

• Experience in power integrity analysis and PDN optimization.
• Familiarity with high-speed design compliance testing and validation.
• Knowledge of EMC/EMI mitigation techniques.

At AWS, we value diversity and encourage candidates from all backgrounds to apply, even if they do not meet all listed qualifications. We promote an inclusive culture with ongoing learning, mentorship, and career growth opportunities.