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Encore Semi, Inc. is seeking a Senior Physical Design Engineer to lead RTL-to-GDSII implementation for GF 12LP cores, owning advanced FinFET design challenges and driving robust timing closure.
This is a 100% remote, US-based role with a salary between $135,000 and $165,000 plus comprehensive benefits. 5+ years of ASIC physical design, Fusion Compiler and PrimeTime expertise, and Tcl/Python scripting are required.
Sr Physical Design Engineer (GF 12LP) – 100% remote
Full-time: Salary + Benefits + Bonuses / Contractor
Work Status: US Citizen required.
Location: Remote, anywhere in USA
We are seeking a Senior Physical Design Engineer to lead the RTL-to-GDSII implementation of high-performance SoCs. In this role, you will take ownership of advanced FinFET design challenges, push Power, Performance, and Area (PPA) boundaries, and drive robust timing closure targeting the GlobalFoundries 12LP node.
The anticipated annual base salary for this position is between $135,000 to $165,000, which also includes a comprehensive benefits package.
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
LinkedIn :: https://www.linkedin.com/in/rtl2gds/