Sr. Engineer, Performance Infrastructure

Tenstorrent; Austin (TX); Hybrid; USD 80,000 - 120,000; Full time

Benefits offered by this job

Highly competitive compensation package

Benefits package

Equal opportunity employer

Job summary

A cutting-edge AI technology company is seeking a talented engineer to join their CPU design team in Austin, TX. Responsibilities include driving improvements in CPU microarchitecture and collaborating with RTL engineers to meet performance goals. Ideal candidates should be skilled in C++ and Python and have a strong understanding of CPU architecture. The position offers a hybrid work model and involves access to advanced technology while promoting a culture of innovation and problem-solving.

Qualifications

• Great at identifying problems and developing solutions.
• Enjoys building tools and optimizing workflows.
• Skilled in C++ and Python, with an understanding of industry-standard tools.

Responsibilities

• Join a team driving improvements in CPU microarchitecture.
• Enhance design environment, tools, and methodologies.
• Collaborate closely with RTL engineers and core architects.

Skills

C++

Python

Problem-solving

Debugging RTL/logics

Performance verification

Microarchitecture knowledge

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high-performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on the RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design.

This role is hybrid, based out of Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Great at identifying problems and developing solutions.
• Enjoys building tools and optimizing work flows.
• Skilled in C++ and Python, with an understanding of industry-standard tools for compilation, simulation and emulation.
• Proficient in debugging RTL/logic across multiple design hierarchies and pre-silicon environments.
• Knowledgeable in architecture and microarchitecture of high-performance CPU cores.
• Ideal candidates would possess experience in infrastructure, methodology and performance verification.

What We Need

• Join a team driving improvements in CPU microarchitecture, verify performance and correlate with the RTL.
• Enhance design environment, tools, and methodologies to improve development efficiency.
• Collaborate closely with RTL engineers and core architects to meet performance goals, debug miscorrelation and verify performance features.
• Use innovative techniques to optimize power, performance, and area while driving performance experiments and evaluating results.

What You Will Learn

• End-to-end exposure to CPU design from microarchitecture through performance convergence and validation.
• Hands-on experience optimizing CPU designs in both pre-silicon and post-silicon phases.
• Integration of open-source and industry-standard tools to improve flows and results.
• Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.