Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Annapurna Labs; Cupertino (CA); On-site; USD 213,000 - 288,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. in Cupertino, CA is seeking an ASIC Design Engineer to design and optimize high‑performance RTL for SOCs and data‑center accelerators.

You will collaborate across architects, verification, and back‑end teams to meet aggressive power, area and timing targets. The role emphasizes SystemVerilog RTL development, lint/CDC checks and strong problem‑solving skills, with opportunities to work on full‑chip and subsystem integration and various design trade‑offs in a

Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• 5+ years in RTL design for SOC.
• 5+ years in VLSI engineering.
• 5+ years with code quality tools including: Spyglass, LINT, or CDC.
• Experience in RTL coding and debug, performance/power/area trade-offs.
• Master's degree in electrical or computer engineering or equivalent.
• 5+ years of semiconductor design including full‑chip and subsystem integration.
• Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints.
• Automation and scripting languages such as Python.
• Familiarity with data path design, interconnects, AXI protocol.
• Excellent analytical, problem solving, and communication skills.

Responsibilities

• As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
• Integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
• Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
• Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
• Perform lint and clock domain crossing quality checks on the design.
• Work with architects, other designers, verification teams, pre- and post-silicon validation teams, synthesis, timing and back-end teams to accomplish your tasks.

Skills

Analytical skills

Problem solving

Communication skills

Python scripting

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical/Computer Engineering or equivalent

Tools

SystemVerilog RTL

Spyglass/LINT/CDC

SDC constraints

Assertions

Job description

Description

Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

Description

Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world‑class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Engineer to help us trail‑blaze new technologies and architectures, while ensuring high design quality and making the right trade‑offs. Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.

Key job responsibilities

• As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
• Integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
• Analyze design, microarchitecture or architecture to make trade‑offs based on features, power, performance or area requirements.
• Develop micro‑architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
• Perform lint and clock domain crossing quality checks on the design.
• Work with architects, other designers, verification teams, pre‑ and post‑silicon validation teams, synthesis, timing and back‑end teams to accomplish your tasks.

You Will Thrive In This Role If You

• Are familiar with scripting in Python
• Are proficient with assertions
• Have good debug skills to analyze RTL test failures
• Have a "Learn and Be Curious" mindset

About The Team

Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge‑sharing and mentorship. Our senior members enjoy one‑on‑one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help your team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.

Diverse Experiences

AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.

Work/Life Balance

We value work‑life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud.

Inclusive Team Culture

Here at AWS, it’s in our nature to learn and be curious. Our employee‑led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon conferences, inspire us to never stop embracing our uniqueness.

Mentorship & Career Growth

We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge‑sharing, mentorship and other career‑advancing resources here to help you develop into a better‑rounded professional.

Basic Qualifications

• Bachelor's degree in Electrical Engineering or a related field
• 5+ years in RTL design for SOC
• 5+ years in VLSI engineering
• 5+ years with code quality tools including: Spyglass, LINT, or CDC

Preferred Qualifications

• Experience in RTL coding and debug, as well as performance, power, area analysis and trade‑offs
• Master's degree in electrical engineering, computer engineering, or equivalent
• 5+ years of practical semiconductor design work including full‑chip and subsystem integration experience
• Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
• Experience with automation and scripting languages such as Python
• Familiarity with data path design, interconnects, AXI protocol
• Good analytical, problem solving, and communication skills

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign‑on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, CA, Cupertino - 213,000.00 - 287,500.00 USD annually

Company

- Annapurna Labs (U.S.) Inc.

Job ID: A3205794