SoC Modeling Engineer

Qualcomm; San Diego (CA); On-site; USD 115,600 - 173,400; Full time

Benefits offered by this job

Competitive annual discretionary bonus

Opportunity for annual RSU grants

Job summary

Qualcomm is looking for an engineer to support the SoC Architecture team in California. The role involves modeling various physical and performance aspects of SoC operation, including electrical and thermal systems, as well as Power Delivery circuits.

Candidates should have a Bachelor's, MS, or PhD in Engineering and relevant experience in ASIC design. The competitive pay range is between $115,600 and $173,400, along with bonuses and a comprehensive benefits package.

Qualifications

• 2+ years of ASIC design, verification, validation, integration, or related work experience.
• 1+ year of ASIC design experience with a Master's degree.
• Knowledge of AI, Machine Learning, and Computer Architecture is a plus.

Responsibilities

• Support SoC Architecture team with modeling various physical aspects of SoC.
• Model electrical systems and circuits at component and transistor level.
• Model Power Delivery circuits (PMIC and PDN).

Skills

MATLAB

Simulink

SPICE simulations

Modeling of electrical systems

Modeling of thermal systems

Digital design

Automation of simulations

Excellent communication skills

Education

Bachelor's degree in Science, Engineering, or related field

MS or PhD in Electrical or Thermal Engineering, Applied Mathematics

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

This role is to support expanding SoC Architecture team with modeling of various physical and performance aspects of SoC operation.

Experience Requirements

• Hands‑on with MATLAB, Simulink or similar products
• Hands‑on with SPICE simulations at component and device level
• Modeling of electrical systems and circuits, at component and transistor level
• Modeling of thermal systems
• Modeling of Power Delivery circuits (PMIC and PDN)
• Digital design at RTL, gate‑level and transistor level
• Modeling of SoC traffic patterns
• Automation of simulations and exploration space
• Ability to work under supervision and independently
• Excellent comprehension, organization, communication and presentation skills

Desired Educational Background

• MS or PhD in Electrical or Thermal Engineering, Applied Mathematics
• Knowledge of AI, Machine Learning, Computer Architecture, Queueing Theory is a plus

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field.

Equal Opportunity Employer

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e‑mail [e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay and Benefits

Pay range: $115,600.00 - $173,400.00

We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. Our highly competitive benefits package is designed to support your success at work, at home, and at play.

If you would like more information about this role, please contact Qualcomm Careers.