SoC Display Subsystem Architect - Platform Innovation

Apple, Inc.

San Diego (CA)

On-site

USD 205,000 - 309,000

Full time

24 hours ago
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Job summary

Apple, Inc. in San Diego area is seeking a senior architect to lead the architecture of the SoC display subsystem, collaborating with SoC and fabric architects, software, and system engineers to shape display pipeline controls, memory interfaces, and data paths.

The ideal candidate will bring 20+ years in signal/image processing, an MS or PhD, and deep memory subsystem expertise, with strong ability to model architectures and drive energy/performance tradeoffs across design stages.

Qualifications

  • Experience in chip architecture or display subsystem architecture and/or design.
  • MS or PhD degree.
  • Deep knowledge of memory subsystem, memory interface and DMA.
  • Proven ability to model architectures and tradeoffs between performance and energy.
  • Strong cross‑functional communication skills.

Responsibilities

  • Architect SoC display subsystem in collaboration with SoC/fabric architects, software and system engineers.
  • Define display subsystems including display pipe control, memory and interfaces.
  • Provide architectural guidance through design concept to production.
  • Recommend design tradeoffs across architecture and performance.
  • Author and maintain display subsystem architecture specifications.

Skills

20+ years of signal/image processing
Understanding of SoC display sub‑sys
Architectural modeling ability
Communication skills with cross‑funct.

Education

MS or PhD degree

Job description

Apple, Inc. in San Diego area is seeking a senior architect to lead the architecture of the SoC display subsystem, collaborating with SoC and fabric architects, software, and system engineers to shape display pipeline controls, memory interfaces, and data paths.

The ideal candidate will bring 20+ years in signal/image processing, an MS or PhD, and deep memory subsystem expertise, with strong ability to model architectures and drive energy/performance tradeoffs across design stages.

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