SoC Design Engineer - Next-Gen AI & Graphics ASIC

Advanced Micro Devices, Inc.

Austin (TX)

On-site

USD 150,000 - 190,000

Full time

14 days+

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Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices, Inc. (AMD) seeks a Computing & Graphics SoC Architect to design custom silicon for client and graphics platforms.

You will work with the lead architect to shape customer-specific architectures, contribute to micro-architecture specs, and evaluate performance, power, and area trade-offs across development stages. You will collaborate with global teams, translate requirements into detailed specs, and ensure architectural alignment with IP and engineering groups while

Qualifications

  • Bachelor's, Master's or PhD in Electrical/Computer Engineering or CS.
  • Experience with SoC development and architecture preferred.

Responsibilities

  • Influence and define next-generation architecture.
  • Analyze performance, power, and area trade-offs.
  • Compile competitive analysis data.
  • Translate product requirements into detailed specs.
  • Ensure architectural alignment and interoperability across teams.
  • Maintain end-to-end process documentation for cross-team clarity.

Skills

Fabric connectivity
Memory systems
Power delivery
Clock distribution
Floor planning
Packaging
Scripting
Data analysis
EDA tools
VLSI design flow
CMOS technology
Organizational skills
Communication skills

Education

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Perl
TCL
Python

Job description

Advanced Micro Devices, Inc. (AMD) seeks a Computing & Graphics SoC Architect to design custom silicon for client and graphics platforms.

You will work with the lead architect to shape customer-specific architectures, contribute to micro-architecture specs, and evaluate performance, power, and area trade-offs across development stages. You will collaborate with global teams, translate requirements into detailed specs, and ensure architectural alignment with IP and engineering groups while

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