Silicon Validation Intern - Onsite Summer 2027

Renesas; San Jose (CA); On-site; USD 47,000 - 67,000; Full time

Benefits offered by this job

Bonus opportunities

Job summary

Renesas is seeking a proactive Validation Intern for Summer 2027 (May 24 – August 13), 100% onsite in San Jose. You will assist in bench validation plans for DDR, MCR, memory controllers and other ICs.

Collaborate with Design, Test and Marketing to translate requirements into validation strategies. Use oscilloscopes, BERT, AWG and related test equipment for electrical characterization, document results, and help improve automated validation scripts.

Qualifications

• Pursuing a Master's degree in Electrical Engineering, Computer Engineering, or related field. Graduating December 2027 preferred.
• Strong understanding of digital and analog circuits, semiconductor devices, and computer architecture principles.
• Familiarity with lab equipment and measurement techniques for silicon validation, including oscilloscopes, power supplies, BERT, AWGs, etc.
• Proficiency in programming languages such as Python, C/C++, or scripting languages for test automation and data analysis.
• Hands-On Experience with Python test automation equipment such programmable power supplies, multimeters, oscilloscopes, etc.
• Excellent problem-solving skills with the ability to analyze complex technical issues and propose effective solutions.
• Strong communication and teamwork skills, with the ability to collaborate effectively with cross-functional teams.
• Eagerness to learn and adapt to new technologies and methodologies in the field of silicon validation.

Responsibilities

• Assist in the development and execution of bench validation plans and conducting validations for new silicon products, including DDR, MCR, Memory Controllers or other ICs.
• Collaborate with cross-functional teams including Design, Test, and Marketing to understand product requirements and develop comprehensive validation strategies.
• Utilize lab equipment such as Oscilloscopes, BERT, AWG, and other test instruments to perform electrical characterization and performance benchmarking.
• Document test procedures, results, and findings in detailed engineering reports and contribute to the continuous improvement of validation methodologies.
• Assist in debugging and troubleshooting silicon issues, working closely with design and Test Engineers to implement effective solutions.
• Contributes to the development and enhancement of automated test frameworks and validation scripts to streamline the validation process and improve efficiency.

Skills

Python

C/C++

Lab equipment

Test automation

Problem solving

Communication

Teamwork

Eagerness to learn

Education

Master's degree in Electrical Engineering/Computer Engineering

Tools

Oscilloscopes

BERT

AWG

Job description

Renesas is seeking a proactive Validation Intern for Summer 2027 (May 24 – August 13), 100% onsite in San Jose. You will assist in bench validation plans for DDR, MCR, memory controllers and other ICs.

Collaborate with Design, Test and Marketing to translate requirements into validation strategies. Use oscilloscopes, BERT, AWG and related test equipment for electrical characterization, document results, and help improve automated validation scripts.