Silicon Validation Engineer

Lyte; Sunnyvale (CA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Competitive salary

Equity

Healthcare coverage

401(k)

Flexible vacation

Cross-functional team

Cutting-edge technology

Job summary

Lyte is seeking a hands-on Validation Engineer to bring up custom silicon from power-on through production readiness within a cross-functional team spanning analog, logic, and package design.

You will own bring-up, debugging, and end-to-end characterization, building automated test scripts in Python/Perl for high-throughput validation and ensuring compliance of high-speed interfaces and mixed-signal performance at the bench.

Qualifications

• BS, MS, or PhD in Electrical Engineering from a top research university.
• 2–8 years of hands-on chip or system bring-up and validation experience.
• Proficiency in Python or Perl for test automation and data analysis.
• Experience validating high-speed serial interfaces.
• Understanding of analog fundamentals such as signal integrity, transmission lines, feedback theory, and voltage/current source compliance testing.
• Understanding of frequency domain and time-domain measurements and correlations.
• Solid analog circuit knowledge: bias networks, LDOs, PLLs, ADCs/DACs, and mixed signal interfaces – and the hands-on instincts to debug them at the bench.
• Ability to read and interpret schematics, layout files, and datasheet specs.

Responsibilities

• Lead silicon bring-up for new silicon tape-outs – first power-on through functional validation
• Develop and execute structured test plans covering functional, electrical, and performance validation
• Characterize analog and digital circuit behavior against the product spec
• Build automated test infrastructure using Python/Perl for high-throughput characterization
• Debug complex mixed-signal devices – power, clocking, mixed-signal interfaces using oscilloscopes, logic analyzers, spectrum analyzers, and protocol analyzers
• Validate high-speed interfaces including signal integrity analysis
• Root-cause issues; distinguish design vs. process vs. board-level failures

Skills

Python

Perl

Chip bring-up

System validation

Analog/digital circuits

Signal integrity

High-speed interfaces

Schematic reading

Education

BS/MS/PhD in Electrical Engineering

Tools

Oscilloscopes

Logic analyzers

Spectrum analyzers

Protocol analyzers

Job description

About Lyte

Lyte builds perception systems for Physical AI operating in complex environments. The company combines custom silicon, integrated sensors, and software into a unified platform for robotics, mobility, and next‑generation automation. Lyte is headquartered in Sunnyvale, California, with a global presence. For more information, visit www.lyte.ai

About the Role

We are seeking a hands‑on Validation Engineer to take our custom silicon devices from first power‑on to production readiness. Embedded in a cross‑functional team spanning analog design, logic design and package design, you will own bring‑up, debug, and end‑to‑end characterization bridging design intent and real‑world silicon behavior.

What You'll Do

• Lead silicon bring‑up for new silicon tape‑outs – first power‑on through functional validation
• Develop and execute structured test plans covering functional, electrical, and performance validation
• Characterize analog and digital circuit behavior against the product spec
• Build automated test infrastructure using Python/Perl for high‑throughput characterization
• Debug complex mixed‑signal devices – power, clocking, mixed‑signal interfaces using oscilloscopes, logic analyzers, spectrum analyzers, and protocol analyzers
• Validate high‑speed interfaces including signal integrity analysis
• Root‑cause issues; distinguish design vs. process vs. board‑level failures

Required Qualifications

• BS, MS, or PhD in Electrical Engineering from a top research university
• 2–8 years of hands‑on chip or system bring‑up and validation experience
• Proficiency in Python or Perl for test automation and data analysis
• Experience validating high‑speed serial interfaces
• Understanding of analog fundamentals such as signal integrity, transmission lines, feedback theory, and voltage/current source compliance testing
• Understanding of frequency domain and time‑domain measurements and correlations
• Solid analog circuit knowledge: bias networks, LDOs, PLLs, ADCs/DACs, and mixed signal interfaces – and the hands‑on instincts to debug them at the bench
• Ability to read and interpret schematics, layout files, and datasheet specs

Preferred Qualifications

• PVT corner characterization and yield analysis experience
• Prior experience taping out a custom ASIC from prototype to production
• Reliability testing exposure: HTOL, ELFR, ESD/latch‑up

Benefits (subject to location and local regulations)

• Competitive salary and equity
• Comprehensive medical, dental, and vision coverage
• 401(k) retirement plan
• Flexible vacation and time‑off policy
• Collaborative, fast‑paced, and inclusive work environment
• Opportunity to work on cutting‑edge technologies with a highly cross‑functional team

Pay Range

170,000 - 250,000 USD per year (Bay Area, CA)