Silicon Technical Program Manager

Normal Computing Corporation; Mountain View (CA); On-site; USD 190,000 - 270,000; Full time

Job summary

Normal Computing Corporation in Mountain View seeks a seasoned Technical Program Manager to translate company objectives into actionable milestones across silicon, systems, and software. You will own schedules spanning architecture to post-silicon validation and coordinate globally with teams in Mountain View, New York, London, Zurich and Copenhagen.

The role requires 10+ years in semiconductor development and a proven track record leading distributed engineering teams, with strong stakeholder

Qualifications

• 10+ years in semiconductor development, including TPM/program lead experience.
• Strong communication and stakeholder management; ability to influence without authority.
• Experience in complex software/hardware integration environments.
• Proven track record leading internationally distributed engineering teams.
• Proficiency with Jira, Asana, or Linear for program tracking.

Responsibilities

• Break down objectives into milestones across silicon, systems, and software.
• Own the schedule for silicon, systems, and software development lifecycle.
• Coordinate efforts across Mountain View, NYC, London, Zurich, and Copenhagen.
• Define metrics and dashboards to surface progress.
• Identify risks to delivery and quality; provide executive updates.
• Synthesize technical status and trade-offs for leadership.

Skills

Communication

Stakeholder management

Program management tools

Distributed teams

Semiconductor development

Education

PhD in Electrical Engineering

Tools

Jira

Asana

Linear

Job description

Normal Computing | Build with Us

Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.

The Role

In partnership with our engineering leads, you will break down company objectives into actionable milestones across the engineering org. You will own the schedule across the entire product development lifecycle: silicon, systems and software. You will surface information in a digestible format so that engineering executives are acutely aware of the current state of the project. You will also help to resolve issues across teams. Your work will ensure we ship on time.

What You Will Own

• Break down company objectives into actionable milestones across the engineering org.
• Own the schedule across the silicon development cycle (architecture, micro-architecture, RTL generation, verification, logic synthesis, design for test, physical design, physical verification, tapeout, packaging, post-silicon testing, bring-up and post-silicon validation), the systems and manufacturing cycle (PCB and board bring-up, server and rack integration and system validation), and software development (compilers, LLVM/MLIR/TVM lowerings, vLLM support and SDKs that support cloud providers).
• Coordinate these efforts across our teams in Mountain View, New York, London, Zurich and Copenhagen.
• Define metrics, create dashboards and other mechanisms to surface information and track progress.
• Identify and mitigate risks to delivery schedules and quality.
• Synthesize complex technical status, trade-offs, and risks into clear updates for executive leadership.

What Makes You a Great Fit

• 10+ years in semiconductor development, including 3+ years as a TPM or program lead across silicon, systems and software.
• Excellent communication and stakeholder management skills; ability to influence without authority.
• Experience in companies with complex software/hardware integration.
• Proven track record managing internationally distributed engineering teams.
• Proficiency with program management tools such as Jira, Asana or Linear.
• Experience with every element of the silicon life-cycle from architecture and RTL generation to verification, tapeout, bring-up and post-silicon validation.
• Ability to think out-of-the-box to find solutions.

Bonus Points

• Ph.D. in an electrical engineering discipline.
• Familiarity with chiplets and 3D packaging.
• Expert at using Linear for program management tracking.
• Familiarity with heterogeneous systems used for AI inference.
• Experience working with external silicon foundries such as TSMC, Tier II vendors and OSAT vendors.
• Experience working at a silicon startup.

Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.

Accessibility Accommodations

Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at [e-mail].

Privacy Notice

By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.