Silicon Hardware TPM — End-to-End Chip Program Lead

Jobtailor; Mountain View (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Jobtailor in Mountain View, CA seeks a seasoned Technical Program Manager to lead cross-functional Silicon hardware programs from concept to production. You will own the execution roadmap, coordinate architecture, RTL, and verification, and drive milestones, risks, and tapeout readiness with multiple engineering teams.

The role requires 15+ years in chip development and 3+ years in a technical program manager capacity, with strong communication skills and governance capabilities across schedules

Qualifications

• 15+ years of experience in chip/IC development
• At least 3 years in a technical program manager role
• Experience leading Silicon HW programs through multiple silicon lifecycle phases
• Experience coordinating cross-functional engineering teams and vendors
• Technical fluency in SoC or chiplet design flows (RTL milestones, DV signoff, silicon bring-up)
• Strong judgment on performance, power, area, cost, schedule, and risk
• Ability to drive schedules, dependencies, issue tracking, risk management, and executive updates
• Experience coordinating design reviews and driving closure across teams
• Excellent written and verbal communication skills
• Authorized to work in the United States and capable of compliance with export control laws
• Bonus: AI infrastructure, datacenter racks, networking/storage systems, or rack-scale validation
• Bonus: high-speed interconnects, liquid-cooled systems, telemetry, diagnostics
• Bonus: BE PD hands-on engineering experience

Responsibilities

• Own the cross-functional execution framework for advanced Silicon HW programs from planning through tapeout
• Drive milestones, dependencies, reviews, risk management, and tapeout readiness across engineering teams
• Lead end-to-end execution of Silicon HW development from concept to production
• Partner with Architecture, RTL Design, and Verification to identify bottlenecks and mitigate risks
• Define operational processes and modes of work for the HW group
• Build stage-gate reviews for transitions from architecture to implementation and verification
• Develop playbooks and best practices for program management across the organization
• Support silicon planning across performance, power, area, cost, reliability, and manufacturability trades
• Track dependencies, schedules, owners, closure dates, critical path, milestones, and escalation paths
• Liaise with hardware teams and leadership, providing clear updates and insights

Skills

Cross-functional leadership

Project management

Risk management

Executive communication

Strong written communication

Tools

Jira

GitHub

Confluence

Smartsheet

MS Project

Google Workspace

Job description

Jobtailor in Mountain View, CA seeks a seasoned Technical Program Manager to lead cross-functional Silicon hardware programs from concept to production. You will own the execution roadmap, coordinate architecture, RTL, and verification, and drive milestones, risks, and tapeout readiness with multiple engineering teams.

The role requires 15+ years in chip development and 3+ years in a technical program manager capacity, with strong communication skills and governance capabilities across schedules