Signal Integrity Engineer — High-Speed SerDes for Satellites

InvestedintheMission; Palo Alto (CA); On-site; USD 115,000 - 185,000; Full time

Job summary

SpaceX is seeking a Signal Integrity Engineer for Starlink to own SI across the hardware lifecycle, from silicon architecture to PCB layout and production. You will work at the intersection of electrical, mechanical, thermal, software, and RF engineering to ensure high-speed SERDES and memory interfaces meet demanding specs.

The role requires hands-on design, debugging, and verification of satellite payloads, plus collaboration with multiple engineering teams to define processes and tooling for

Qualifications

• Bachelor’s degree in electrical engineering, computer engineering, or physics.
• 1+ years of industry experience designing circuits, electronic products, or hardware.
• 1+ years of experience using one of the 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS etc.).
• 1+ years of research or industry experience with high-speed digital design.

Responsibilities

• Specify, design, simulate, verify, qualify, define production screens for, and generally troubleshoot SI aspects of advanced satellite hardware.
• Work alongside RF, antenna, ASIC, packaging, mechanical, thermal, software, supply chain, and production engineers to architect new products employing novel channels and interfaces.
• Derive top level specifications for PCB materials and channel subcomponents.
• Design and optimize transition structures for the entire channel from die bump to die bump.
• Root cause and fix issues found in PCB manufacturing, PCBA test, or satellite integration.
• Define best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs for all SI needs on Starlink satellite payloads.

Skills

Electrical engineering

Python

C/C++

Education

Bachelor’s degree in electrical engineering, computer engineering, or physics

Tools

CST

HFSS

ADS

Job description

SpaceX is seeking a Signal Integrity Engineer for Starlink to own SI across the hardware lifecycle, from silicon architecture to PCB layout and production. You will work at the intersection of electrical, mechanical, thermal, software, and RF engineering to ensure high-speed SERDES and memory interfaces meet demanding specs.

The role requires hands-on design, debugging, and verification of satellite payloads, plus collaboration with multiple engineering teams to define processes and tooling for