Signal and Power Integrity Engineer - Serial IO Interface

Apple Inc.; San Francisco (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Apple Inc. is seeking a Signal and Power Integrity Engineer for its Serial IO Interface. You will own high-speed SI/PI for SERDES, work across silicon to board levels, and validate interfaces with 3D simulations and lab measurements.

The role demands a BS with 10+ years of experience (PhD and 8+ years preferred), and strong familiarity with VNA, TDR, and oscilloscopes. You will collaborate with design teams to optimize interfaces in Apple devices.

Qualifications

• BS and 10+ years of relevant industry experience.
• Strong background in signal and power integrity for high-speed interfaces.
• Experience with design and validation across silicon to board levels.

Responsibilities

• Lead SI/PI for high-speed serdes interfaces and get PI aligned with product requirements.
• Define, influence, and implement interface specifications across platforms.
• Perform 3D model extractions and simulations for design optimization.
• Drive co-design across SOCs, packages, and systems to optimize KPI.
• Execute end-to-end PDN sign-off and power integrity analyses.

Skills

SI/PI knowledge

Lab equipment experience

3D EM simulation

Transmission line theory

Education

Bachelor's Degree in Electrical Engineering

PhD in a related field

Tools

VNA

TDR

Oscilloscope

Spectrum Analyzer

Job description

Signal and Power Integrity Engineer - Serial IO Interface

In this position, you will work with the team that develops SOCs used within Apple devices. You will be specifically responsible for high-speed serial interface signal integrity and power integrity for Apple SOCs covering the span from silicon to package to board. Prior design and modeling experience with USB, PCIe, or comparable interfaces is a must-have.

Description

Work on the electrical and physical design of high-speed serial interface systems. Work on the electrical extraction and validation of package and PCB. Work with circuit design team and vendor to optimize circuit and system design SI and PI modeling, simulation, and characterization of high-speed serial interface. Develop and execute test plans to validate signal and power integrity. Work with product engineering and system engineering to debug and improve product yield.

Responsibilities

• The candidate will be responsible for all aspects of SI in high speed serdes interfaces, including power integrity if applicable.
• The candidate will define, influence, and implement interface specifications.
• The candidate will perform 3D model extractions and simulations for design optimization, verification, and validation on all relevant channel components, including silicon analog front ends, package interposers and substrates, PCBs, connectors, and cables.
• The candidate will drive co-design across SOCs, packages, and systems to optimize KPI in Apple products.
• Perform end-to-end PDN sign off including modeling of die/interposer/PKG/PCB/PMU, conduct transient voltage noise simulations for inrush and coupled noise analysis, to meet stringent impedance, voltage droop spec. and PSIJ requirements.

Minimum Qualifications

• BS and 10+years of relevant industry experience.

Preferred Qualifications

• PhD and 8+ years industry experience (or equivalent).
• You should be familiar with signal and power integrity issues of high speed serial interfaces.
• Experience working with the actual product package/board design and analysis, SI/PI methodology development, and lab correlation/validation of the simulation results.
• Familiarity with lab equipment, such as: VNA, TDR, real-time scope, spectrum analyzer, etc.
• Possess strong fundamentals in 3D/2D EM simulation tools and transmission line theory.
• Excellent academic background and experience beyond graduate school studies.

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Apple accepts applications to this posting on an ongoing basis.