Signal and Power Integrity Engineer - Hardware

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 116,000 - 189,750; Full time

Job summary

NVIDIA Gruppe is seeking a Signal & Power Integrity Engineer located in Santa Clara, California. The ideal candidate will craft innovative Signal Integrity solutions for high-speed systems and perform advanced simulations of cutting-edge interfaces like NVlink and USB-4.

A strong electrical engineering background with hands-on experience in 3D modelling tools and at least 2 years in the industry is necessary. The position offers a competitive salary range based on experience and is committed to diversity in hiring.

Qualifications

• Minimum of 2+ years in industry.
• Strong technical background in applied electromagnetics.
• Hands-on use of 3D modelling tools.

Responsibilities

• Craft creative Signal Integrity solutions.
• Perform system-level signal integrity simulations.
• Collaborate cross-functionally to optimize circuits.

Skills

Signal Integrity

System Design

3D EM Tools

Electromagnetics

Transmission Line Theory

Education

BS/MS in Electrical Engineering

Tools

ANSYS HFSS/Q3D

MATLAB

Cadence Allegro

Job description

We are now looking for a Signal & Power Integrity Engineer!

What you'll be doing:

• Craft creative Signal Integrity solutions for complex system design problems.
• Model and optimize vias, connectors, sockets, breakouts and various system components in 3D EM tools.
• Perform system-level signal integrity simulations of high‑speed NVlink 200Gbs+, USB‑4, PCIe5, GDDR6, LP5X and other interfaces.
• Continuously improve SI models using data from lab measurements and/or modelling tool/methodology updates.
• Create, review and post‑layout SI guidelines and extractions for substrate and board layout.
• Automate simulations, gather data, analyze and visualize results using JMP, MATLAB or similar tools.
• Collaborate cross‑functionally to optimize package, PCB, ASIC and mixed‑signal circuits.

What we need to see:

• BS/MS in Electrical Engineering or equivalent experience with a minimum of 2+ years in industry.
• Strong technical background in applied electromagnetics, transmission line theory and signal processing.
• Experience with SI on one or more signaling standards such as PCI Express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X, etc.
• Hands‑on use of 3‑D modelling tools like ANSYS HFSS/Q3D, 2.5‑D with ANSYS SIWAVE or similar, and 2D such as Ansys2D.
• Familiarity with system‑level timing or loss budgets including silicon, package and board impairments.
• Background using VNA, TDR, DSO, ParBERT and tools/applications like ADS, Ansys Designer, JMP, MATLAB, Cadence Allegro.

Ways to stand out from the crowd:

• Experience in SI simulation and verification of test sockets, LGA sockets and mezzanine connectors, and designing channels that include them.
• Expertise in high‑speed interface SI/PI design on industry‑standard system platforms.
• Experience with lab measurements, debugging, SI lab correlation using oscilloscope, spectrum analyzer, VNA.
• Knowledge of circuit design, board/package technology, link architecture and timing‑budget methodologies.
• Familiarity with PDN evaluation using layout‑extraction tools for packages and PCBs and spice‑based time‑domain simulations.

Base salary range is $116,000 – $189,750 for Level2, and $136,000 – $218,500 for Level3. You will also be eligible for equity and benefits.

Applications are accepted until March21,2026.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal‑opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.