Senior VLSI Methodology Eng - Automation & Library QC

Thomas To; Santa Clara (CA); On-site; USD 136,000 - 265,000; Full time

Job summary

NVIDIA in Santa Clara, CA seeks a Senior VLSI Methodology Engineer to design automation powering library modeling, quality checks, and release for PD flows. Build data-driven pipelines and verification systems, collaborating with process and cell-design teams to push modeling standards forward on advanced nodes.

Requirements include MS in EE, 4+ years in library/physical design, hands-on with Innovus, Fusion Compiler, Crosscheck or Virtuoso, and proficiency in Python, C++, or Perl for scripting

Qualifications

• M.S. in Electrical Engineering or related field (or equivalent experience).
• 4+ years of Library, Physical Design, and/or CAD methodology experience.
• Hands-on development with industry-standard EDA tools (Innovus, Fusion Compiler, Crosscheck, Virtuoso) including scripting, customization, or tool integration.
• Advanced Python, C++, or Perl skills; workflow automation and data pipelines development experience (data collection, validation, and reporting/dashboards).

Responsibilities

• Build scalable systems (from validation pipelines through dashboards) for quality checking of GPU and SOC libraries.
• Develop automated library analysis, validation, and quality control flows using modern scripting and EDA tools.
• Collaborate with our design teams to integrate library quality systems and enhance cell design methodologies, applying adaptive threshold partitioning.
• Define and implement guidelines for library modeling, abstraction, and data integrity, that drive innovation.

Skills

Python

C++

Perl

Data pipelines

Education

M.S. in Electrical Engineering

Tools

Innovus

Fusion Compiler

Crosscheck

Virtuoso

Job description

NVIDIA in Santa Clara, CA seeks a Senior VLSI Methodology Engineer to design automation powering library modeling, quality checks, and release for PD flows. Build data-driven pipelines and verification systems, collaborating with process and cell-design teams to push modeling standards forward on advanced nodes.

Requirements include MS in EE, 4+ years in library/physical design, hands-on with Innovus, Fusion Compiler, Crosscheck or Virtuoso, and proficiency in Python, C++, or Perl for scripting