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AccelerComm Ltd on the West Coast seeks a Senior Verification Engineer to lead end-to-end verification of RTL-based ASIC/FPGA IP using SystemVerilog and UVM.
You will build testbenches, coverage models, and debug across teams, contributing to CI workflows and supporting design reviews and tape-out readiness.
Department: Hardware
Employment Type: Full Time
Location: West Coast, United States
Our RTL team delivers efficient ASIC and FPGA implementations of advanced communications algorithms, working across IP development, integration and verification. To support this work, we are looking for a Senior Verification Engineer to support the complete UVM verification of Accelercomm IP.
Responsible for verification of RTL implementations for advanced wireless communications IP and modem subsystems, ensuring designs meet functional, performance and quality requirements prior to FPGA deployment and ASIC tape-out.
Required
Desirable
We offer a bonus scheme which pays up to 20% of salary annually, depending on performance. This is in addition to stock options and a range of good quality company benefits including 401K, health/dental/optical insurance. We operate flexible working hours and offer hybrid working.
Applicants with existing H-1B visa or practical training work authorization are welcome to apply if they are seeking a change of employer. We are unable to sponsor new applications