Senior Verification Engineer

IC Resources; United States; Remote; USD 110,000 - 180,000; Full time

Benefits offered by this job

Equity or stock options

Remote work availability

Health and retirement benefits

Job summary

IC Resources is seeking a Senior Verification Engineer to join an experienced hardware team developing high-performance digital communications and signal-processing IP for ASIC and FPGA platforms. You will own verification across the design lifecycle, partnering with RTL designers, architects and integration teams to ensure designs meet functional, performance and quality requirements.

The role emphasizes verification planning, testbench development, coverage models and CI workflows, with

Qualifications

• Degree in Electronic Engineering, Computer Engineering or related technical discipline.
• At least three years of experience verifying digital ASIC and/or FPGA designs.
• Strong SystemVerilog and UVM skills.
• Good RTL design principles and hardware implementation.
• Practical experience with coverage-driven and assertion-based verification.
• Proficiency with Linux and scripting in Python, Tcl, Bash or similar.
• Strong analytical, debugging and problem-solving skills.
• Experience using AI tools to improve verification productivity while maintaining quality.
• Ability to collaborate effectively across design, verification and integration teams.
• Experience with DSP, wireless or other complex datapath designs.
• Familiarity with modem architectures, physical-layer processing or communications algorithms.
• Experience with formal verification techniques.
• Exposure to FPGA prototyping and continuous integration environments.
• Familiarity with MATLAB or equivalent modelling and reference tools.
• Equity or stock-option participation.

Responsibilities

• Develop verification plans based on design specifications and architecture requirements.
• Create, maintain and enhance SystemVerilog/UVM verification environments.
• Develop testbenches, assertions, scoreboards and functional coverage models.
• Implement and execute directed and constrained-random tests.
• Analyse coverage results, investigate failures and debug RTL and verification issues.
• Support IP, subsystem and system-level integration.
• Improve regression automation, verification tooling and continuous integration workflows.
• Contribute to design reviews, verification sign-off and quality processes.
• Share technical knowledge and support the development of junior engineers.

Skills

Analytical thinking

Debugging

Problem solving

Team collaboration

Verification planning

Education

Bachelor's degree in Electronic Engineering, Computer Engineering or related technical discipline

Tools

SystemVerilog

UVM

Python

Tcl

Bash

MATLAB

Linux

AI tools

Job description

We are seeking a Senior Verification Engineer to join an experienced hardware engineering team developing high-performance digital communications and signal-processing IP for ASIC and FPGA platforms.

You will take ownership of verification activities across the design lifecycle, working closely with RTL designers, architects and integration teams to ensure designs meet functional, performance and quality requirements before deployment.

Key Responsibilities

• Develop verification plans based on design specifications and architecture requirements.
• Create, maintain and enhance SystemVerilog/UVM verification environments.
• Develop testbenches, assertions, scoreboards and functional coverage models.
• Implement and execute directed and constrained-random tests.
• Analyse coverage results, investigate failures and debug RTL and verification issues.
• Support IP, subsystem and system-level integration.
• Improve regression automation, verification tooling and continuous integration workflows.
• Contribute to design reviews, verification sign-off and quality processes.
• Share technical knowledge and support the development of junior engineers.

Skills, Knowledge and Experience

Required

• Degree in Electronic Engineering, Computer Engineering or a related technical discipline.
• At least three years of experience verifying digital ASIC and/or FPGA designs.
• Strong SystemVerilog and UVM skills.
• Good understanding of RTL design principles and hardware implementation.
• Practical experience with coverage-driven and assertion-based verification.
• Proficiency with Linux and scripting in Python, Tcl, Bash or similar.
• Strong analytical, debugging and problem-solving skills.
• Experience using AI tools to improve verification productivity while maintaining quality.
• Ability to collaborate effectively across design, verification and integration teams.
• Experience with digital signal processing (DSP), wireless communications or other complex datapath designs.
• Familiarity with modem architectures, physical-layer processing or communications algorithms.
• Experience with formal verification techniques.
• Exposure to FPGA prototyping and continuous integration environments.
• Familiarity with MATLAB or equivalent modelling and reference tools.
• Performance-related annual bonus.
• Equity or stock-option participation.
• Retirement savings plan and health, dental and vision benefits.
• Hybrid working arrangements.

About the Opportunity

Join a specialist hardware engineering team working on technically challenging communications and signal-processing technologies. The role offers the opportunity to contribute to complex digital designs, collaborate with experienced engineers and take ownership of verification from planning through to sign-off.

You will work in an environment that values technical rigour, practical problem-solving, engineering collaboration and continuous improvement.

Department: Hardware Engineering

Employment Type: Full-time

Location: United States

Workplace: Remote

Work Authorisation: Candidates must already have valid US work authorisation. The employer is unable to sponsor new work-authorization applications or accept OPT candidates.