Senior Triton GPU Compiler & Kernel Engineer

AMD; San Jose (CA); Hybrid; USD 180,000 - 240,000; Full time

Benefits offered by this job

AMD Benefits

Job summary

AMD is seeking a Senior Triton Compiler and Kernel Engineer in San Jose, CA, to advance Triton performance on AMD GPUs. You will work across GPU architecture, compilers, and AI frameworks, contributing to upstream Triton and ROCm.

The role demands deep expertise in GPU programming, compiler design, and high-performance kernel development. Ideal candidates will have strong experience with Triton/LLVM/MLIR, CUDA/HIP, and distributed training.

Qualifications

• Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.
• Experience with Triton/LLVM/MLIR and GPU compilers preferred.
• Strong debugging, profiling, and collaboration skills.

Responsibilities

• Develop and optimize Triton compiler support for AMD GPUs.
• Improve compiler lowering, optimization, scheduling, and code generation.
• Create high-performance kernels for AI workloads (attention, GEMM, MoE).
• Develop multi-GPU kernels and communication primitives.
• Enable new AMD GPU/interconnect capabilities via Triton abstractions.
• Analyze compute, memory, and generated code for efficiency.
• Collaborate with architecture, ROCm, PyTorch, and AI teams.
• Contribute designs to upstream Triton and LLVM/MLIR.
• Provide technical leadership and code reviews.

Skills

GPU architecture

Compiler development

High-performance kernels

Multi-GPU communication

Distributed AI

AI workload performance

Low-level performance

Analytical thinking

Communication

Education

Bachelor’s or Master’s in CS/CE/EE

Tools

Triton

LLVM/MLIR

HIP/CUDA

Job description

AMD is seeking a Senior Triton Compiler and Kernel Engineer in San Jose, CA, to advance Triton performance on AMD GPUs. You will work across GPU architecture, compilers, and AI frameworks, contributing to upstream Triton and ROCm.

The role demands deep expertise in GPU programming, compiler design, and high-performance kernel development. Ideal candidates will have strong experience with Triton/LLVM/MLIR, CUDA/HIP, and distributed training.