Senior Transceiver IC Design Engineer (Remote)

IC Enable; Richardson (TX); On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Medical/Dental/Vision and Ancillary

401K Plan with Company Match

Job summary

IC Enable is seeking an experienced Transceiver Integrated Circuit Design Engineer in Richardson, TX. The role targets engineers with 10+ years in transceiver design across 65 nm to FinFET processes, including SiGe and SOI, with SAR and sigma-delta data converters as a plus.

The successful candidate will lead circuit design, architecture, and post-silicon support, with strong emphasis on DFMEA, DFM, and chip-level layout.

Qualifications

• Expert (minimum of 10 years) transceiver circuit design and architecture.
• Ability to create and present design reviews, test/characterization plans
• BSEE/MSEE/PhD in Applicable Field with 10+ years of experience in IC design, or equivalent
• Understanding of digital and analog/mixed signal design (digital front end and RF experience is desired)
• Proven record of technical expertise developing integrated circuit design
• Must have thorough understanding of best practices for silicon development tools and processes and must be able to support post‑silicon effort to enable productization
• Experience with custom layout of circuits is highly desirable
• Strong communication, debugging and analytical skills with complex technical concepts
• Must work well in a team environment
• Experience with a variety of manufacturing technologies and design applications preferred

Skills

Transceiver circuit design

Design reviews

Test/characterization plans

Digital/analog/mixed signal

DFMEA/DFM

Post-silicon support

Chip-level architecture

Custom circuit layout

Communication & collaboration

Manufacturing technologies

Education

BSEE/MSEE/PhD in Applicable Field

Tools

Silicon development tools

Job description

IC Enable is seeking an experienced Transceiver Integrated Circuit Design Engineer in Richardson, TX. The role targets engineers with 10+ years in transceiver design across 65 nm to FinFET processes, including SiGe and SOI, with SAR and sigma-delta data converters as a plus.

The successful candidate will lead circuit design, architecture, and post-silicon support, with strong emphasis on DFMEA, DFM, and chip-level layout.