Senior Technical Staff Engineer – IC Analog Design

Anysilicon; Chandler, Northern (AZ, KY); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Microchip Technology Inc. is seeking a Senior Technical Staff Engineer to lead analog and mixed-signal block development for edge computing SoCs. You will own schematic design, simulation, and verification with cross-functional teams across multiple sites.

The role requires 12+ years of experience in high-speed analog circuits and leadership in developing DAC/ADC architectures, with strong tool proficiency in Cadence Virtuoso, Spectre, and Matlab.

Qualifications

• 12+ years of experience designing high-speed analog circuits (DACs/ADCs, bandgaps, bias blocks, comparators).
• Experience with sigma-delta and SAR ADC architectures.
• BSEE minimum, MSEE+ preferred from an accredited engineering school.

Responsibilities

• Architect and design analog and mixed-signal blocks including DACs and ADCs.
• Own schematic design and simulation at IP/system level to meet targets.
• Supervise layout collaboration on floor planning, matching, routing, shielding, and ESD strategies.
• Translate product requirements into block-level budgets and circuit specs.
• Oversee validation, lab bring-up, bench measurements, and root-cause analysis of silicon issues.
• Collaborate with foundry team to ensure proper PDK/model use and device reliability constraints.

Skills

Analog design

Schematic design

Lab testing

Scripting

Communication

Education

BSEE

MSEE+

Tools

Cadence Virtuoso

Spectre

Matlab

Job description

Senior Technical Staff Engineer – IC Analog Design

Microchip Technology Inc. is seeking a highly experienced IC Analog Design Engineer to lead the development of key analog and mixed signal blocks for next-generation edge computing SoCs. The company values a culture of trust, empowerment, and diversity, offering significant career growth opportunities and a commitment to employee development.

Responsibilities:

• Architect and design performance-critical analog and mixed signal blocks including DACs and ADCs.
• Own schematic design and simulation at the IP and system level to meet performance, area, power, and reliability targets.
• Supervise circuit layout in collaboration with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies.
• Work with the system design team to translate top-level product requirements into detailed block-level budgets and circuit specifications.
• Supervise validation and debug processes, including lab bring-up, bench measurement, correlation to simulations, and root-cause analysis of silicon issues.
• Collaborate with the foundry technology team to ensure proper use of PDKs and models, focusing on device reliability constraints.

Qualifications:

• 12+ years of experience designing high-speed and analog circuits including DACs, ADCs, bandgaps, high accuracy bias blocks, and comparators.
• Broad experience in the development of both sigma-delta and SAR based ADC architectures.
• BSEE minimum, MSEE+ preferred from an accredited engineering school.

Skills:

• Proficiency with industry-standard design tools, including Cadence Virtuoso, Spectre, and Matlab.
• Hands‑on experience with lab testing and debug of analog blocks.
• Experience in scripting and automation (Skill, Python, Tcl, etc.).
• Strong fundamentals in circuit theory, design, and layout including noise, linearity, device non-idealities, parasitics, and on-chip matching networks.
• Strong analytical and problem‑solving skills.
• Excellent verbal communication, documentation, and presentation skills.
• Self‑motivated team player who can work with various cross‑functional groups across different sites.