Senior Superconducting Component & Layout Engineer

Dodmg; Malibu (CA); On-site; USD 141,000 - 176,000; Full time

Job summary

HRL Laboratories, an IBM company, is seeking an Integration Component Design Engineer to create complex superconducting layouts and automate design steps. You will collaborate with RF and packaging teams to ensure manufacturable, high-performance designs for silicon spin quantum computing efforts.

The role requires Virtuoso proficiency and familiarity with foundry constraints, plus scripting (Python) for automation. Strong communication and problem-solving are essential for leadership reviews.

Qualifications

• BS or MS in Electrical Engineering, Mechanical Engineering, Physics, or a related field.
• 5+ years of hands-on experience with CAD layout tools: Virtuoso required; Virtuoso plus Allegro APD strongly preferred.
• Familiarity with layout automation methods: routing, vias, ground plane slotting, metal/dielectric fill.
• Understanding of foundry process constraints, design rules and material-related layout considerations.
• RF design principles, transmission lines, and layout methods for RF sensitive structures.

Responsibilities

• Create, refine, and own complex superconducting component layouts using CAD tools—Virtuoso preferred.
• Collaborate with design engineers to support simulations and design modifications.
• Develop and implement layout automation strategies to improve efficiency and manufacturability.
• Incorporate foundry constraints and design rules into layout decisions and system level design.
• Support RF layout tasks, including transmission lines and parasitic minimization.

Skills

Virtuoso CAD

Allegro APD

layout automation

RF design principles

Python scripting

Education

BS or MS in Electrical Engineering, Physics, or related field

Tools

Virtuoso

Allegro APD

Job description

HRL Laboratories, an IBM company, is seeking an Integration Component Design Engineer to create complex superconducting layouts and automate design steps. You will collaborate with RF and packaging teams to ensure manufacturable, high-performance designs for silicon spin quantum computing efforts.

The role requires Virtuoso proficiency and familiarity with foundry constraints, plus scripting (Python) for automation. Strong communication and problem-solving are essential for leadership reviews.