Senior Staff Architect, Silicon, Google Cloud

Google LLC

Sunnyvale (CA)

On-site

USD 227,000 - 320,000

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Comprehensive benefits package
Equity options
Bonus structure

Job summary

A leading tech firm in Sunnyvale is seeking a Senior Staff Architect to drive cutting-edge TPU technology for AI/ML applications. This role will focus on developing innovative silicon solutions while collaborating with domain experts to enhance performance and efficiency. Candidates must have significant experience in silicon design leadership and a strong educational background in engineering. This position offers a competitive salary and comprehensive benefits package, fostering groundbreaking innovations in computing power worldwide.

Qualifications

  • 10 years of experience in technical leadership focusing on silicon design.
  • Experience in three or more silicon disciplines.
  • Ability to leverage multiple silicon domains for enhanced scalability.

Responsibilities

  • Build relationships with thought leaders to identify improvements.
  • Architect and deploy a coherent system integrating tools and scalable design flows.
  • Guide teams in applying AI-first approaches for development efficiency.

Skills

Silicon design
Technical leadership
Collaboration skills
AI/ML integration

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Electronic Design Automation (EDA) tools

Job description

Overview

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You’ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Senior Staff Architect, you will collaborate closely with domain experts across the silicon development spectrum and leverage your broad and deep experience to define and deploy the development environment that enables building the chips powering the next generation of Google Cloud systems. You will possess uncommonly strong communication and collaboration skills, discover compelling solutions where others see ambiguity, and rally others to develop or deploy them.

In this role, you will work with silicon development teams and your peers in the Infrastructure, Tools, and Methodology team to architect, develop, and advocate the use of design tools and flows that speed the development of ground-breaking TPU, CPU, and networking chips and enable them to provide generational improvements in performance, power, and cost while enhancing reliability. You will weave your work into the deep tech stack of silicon design, composed of a mix of licensed Electronic Design Automation (EDA) tools, custom tooling, and emergent technologies from core.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We’re the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities
  • Build productive relationships with thought leaders across programs to identify improvements, solicit feedback on proposals, and advocate methodology changes to enable convergence on a shared design environment.
  • Leverage deep understanding of silicon development to architect and deploy a coherent system integrating first-party/third-party tools, industry-standard APIs, and scalable, design flows.
  • Partner with Alphabet silicon teams, DeepMind, and ecosystem leaders to ensure remains at the forefront of advanced development while contributing to broader industry progress.
  • Ensure all developed technologies maximize project iteration speed while consistently achieving planned power, performance, cost, and quality metrics across the entire silicon portfolio.
  • Guide teams in applying procedural and AI-first approaches to improve development efficiency and produce natural user interactions with next-generation design technologies.
Minimum qualifications
  • Bachelor’s degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience in technical leadership focusing on one or more critical aspects of silicon design.
  • Experience in three or more silicon disciplines, including architecture modeling, logic design, functional verification, synthesis, timing analysis, DFT, or firmware development.
  • Experience in developing, and deploying advanced tools and development flows that streamline the silicon lifecycle and improve engineering productivity.
Preferred qualifications
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 20 years of experience in advanced silicon development.
  • Experience in identifying silicon methodology changes, architecting a solution, and advocating deployment with impact developers.
  • Experience driving internal or external standardization efforts by defining solutions that bridge complex knowledge gaps among collaborators.
  • Understanding of both front-end (e.g., architecture, logic design, verification) and back-end (e.g., logic synthesis, place-and-route, timing convergence, physical verification).
  • Ability to leverage abstraction across multiple silicon domains, creating generalized solutions that drive architectural agility and enhance scalability for next-generation hardware projects.
About The Job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Senior Staff Architect, you will collaborate closely with domain experts across the silicon development spectrum and leverage your broad and deep experience to define and deploy the development environment that enables building the chips powering the next generation of Google Cloud systems. You will possess uncommonly strong communication and collaboration skills, discover compelling solutions where others see ambiguity, and rally others to develop or deploy them.

In this role, you will work with silicon development teams and your peers in the Infrastructure, Tools, and Methodology team to architect, develop, and advocate the use of design tools and flows that speed the development of ground-breaking TPU, CPU, and networking chips and enable them to provide generational improvements in performance, power, and cost while enhancing reliability. You will weave your work into the deep tech stack of silicon design, composed of a mix of licensed Electronic Design Automation (EDA) tools, custom tooling, and emergent technologies from core.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We’re the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

EEO and Accommodations

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google\'s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Software Engineer III, AI/ML, Core
Software Engineer III, AI/ML, Core

Google LLC • Sunnyvale (CA)

On-site
USD 138,000 - 197,000
Silicon Architect, AI and Infrastructure
Silicon Architect, AI and Infrastructure

Google • Sunnyvale (CA)

On-site
USD 240,000 - 333,000
Equity grants
Bonus target
TPU Hardware Design Engineer, Cloud
TPU Hardware Design Engineer, Cloud

Google LLC • Sunnyvale (CA)

On-site
USD 138,000 - 197,000
Silicon Compute RTL Design Manager, Machine Learning
Silicon Compute RTL Design Manager, Machine Learning

Google • Sunnyvale (CA)

On-site
USD 256,000 - 278,000
Equity
Bonus target (20%)
Benefits package
Physical Design Technical Lead, ASIC, TPU
Physical Design Technical Lead, ASIC, TPU

Google • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
Physical Design Lead, TPU, ASIC
Physical Design Lead, TPU, ASIC

Google • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
Equity
Bonus target
Silicon Validation Product Engineer, Google Cloud
Silicon Validation Product Engineer, Google Cloud

Google • Sunnyvale (CA)

On-site
USD 138,000 - 197,000
Bonus target 15%
Equity
Benefits
ASIC Design Verification Manager, TPU Compute
ASIC Design Verification Manager, TPU Compute

Google • Sunnyvale (CA)

On-site
USD 256,000 - 278,000
Equity
Bonus target 20%
Benefits
Physical Design Lead, ASIC
Physical Design Lead, ASIC

Google • Sunnyvale (CA)

On-site
USD 192,000 - 278,000
Silicon Engineering Intern, PhD, Summer 2027
Silicon Engineering Intern, PhD, Summer 2027

Google LLC • Madison (WI)

On-site
USD 110,000 - 147,000