Senior Software Engineer, VSD – Hybrid (Fremont, CA)

Siemens Mobility; Colorado; Hybrid; USD 129,600 - 233,300; Full time

Job summary

Siemens Industry Software Inc. in Fremont, CA is seeking a Senior Software Engineer - VSD to design and implement robust, scalable software tools for advanced EDA workflows.

The role demands strong C/C++ and Python, plus deep experience optimizing algorithms and deploying hardware-aware software in ASIC/FPGA contexts, with hybrid on-site/remote collaboration. You will work with a small team, integrate new tools into the compilation flow, and partner with QA and documentation to ensure quality.

Qualifications

• MS in EE, CE, CS or related areas.
• 10+ years of experience designing optimization algorithms in EDA or related contexts.
• In-depth expertise with ASIC/FPGA tools.
• Strong software engineering principles and processes.
• Proficiency with C/C++ and Python.
• Hands-on experience with containerization and orchestration tools.
• Excellent communication and interpersonal skills.
• Willingness to travel domestically and internationally.
• On-site or hybrid work arrangement.

Responsibilities

• Design and develop robust and scalable software tools.
• Develop high-performance optimization software solutions.
• Create algorithms and processes to improve results across all platforms.
• Collaborate with data, platform, and other engineers to integrate tools into the broader compilation flow.
• Work with a small team to review specs and find general solutions.
• Collaborate with QA and Docs to create tests and documentation.

Skills

C/C++

Python

ASIC/FPGA

Software engineering

Docker/Kubernetes

Communication skills

Travel willingness

Education

MS in EE/CE/CS

Tools

Docker

Kubernetes

Job description

Siemens Industry Software Inc. in Fremont, CA is seeking a Senior Software Engineer - VSD to design and implement robust, scalable software tools for advanced EDA workflows.

The role demands strong C/C++ and Python, plus deep experience optimizing algorithms and deploying hardware-aware software in ASIC/FPGA contexts, with hybrid on-site/remote collaboration. You will work with a small team, integrate new tools into the compilation flow, and partner with QA and documentation to ensure quality.