Senior Silicon Test & Validation Architect (Equity)

Thomas To; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking a DFP Engineer – Manufacturing to define and drive validation and screening of new silicon features in high‑volume manufacturing. Translate product requirements into test methodologies, infrastructure, and detailed test plans to ensure quality, yield, and efficiency at scale.

You will own end‑to‑end test methodology across all stages, drive AI‑assisted analytics, and collaborate with multi‑functional teams to optimize coverage, timing, and cost while embedding testability into

Qualifications

• MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).
• 6+ years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar.
• Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization.
• Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis.
• Demonstrated ability to drive multi-functional alignment around plans, dependencies, and sign-off criteria.
• Excellent communication skills and comfort authoring structured technical documents and test plans used by global manufacturing and validation teams.
• Strong AI‑enabled skills and thinking - Use AI to accelerate analysis, exploration, and documentation, but also maintain rigor and judgment.
• Prior ownership of manufacturing test strategy for a major silicon product (e.g., GPU/SoC/CPU) from early planning through ramp to QS/production.

Responsibilities

• Own end‑to‑end manufacturing test methodology across all test stages.
• Translate system specs and product POR into DFP requirements, test content, coverage, and flows.
• Define and maintain the DFP roadmap, including infrastructure and turning point planning.
• Partner multi‑functionally to implement test content, debug hooks, and coverage improvements.
• Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade‑offs.
• Embed testability requirements into design to enable robust screening and debug.
• Define data and analytics frameworks to support yield analysis and continuous improvement.
• Lead DFP documentation as the single source of truth and feed findings into future methodologies.

Skills

Python

MATLAB

R

SQL

Education

MS in Electrical/Computer Engineering

Job description

NVIDIA is seeking a DFP Engineer – Manufacturing to define and drive validation and screening of new silicon features in high‑volume manufacturing. Translate product requirements into test methodologies, infrastructure, and detailed test plans to ensure quality, yield, and efficiency at scale.

You will own end‑to‑end test methodology across all stages, drive AI‑assisted analytics, and collaborate with multi‑functional teams to optimize coverage, timing, and cost while embedding testability into