Senior Silicon Photonics PIC Design Engineer

AMD; San Jose (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

AMD is seeking a seasoned technical contributor to drive end-to-end delivery of PIC solutions for optical IO in AI and HPC workloads. You will coordinate across hardware engineering and AMD partners to plan, develop, and optimize PIC implementations for next-generation GPUs.

You are a subject-matter expert in PIC theory, design, layout, and manufacturing, with a track record in DFx, packaging, test, and reliability.

Qualifications

• Experience driving PICs from concept to HVM and field failure analysis.
• Expertise in silicon photonics foundry technology, device design, and circuit layout.
• Proficient in software for photonic design automation, test automation, and data analysis.
• Familiarity with Python and Cadence development.
• Excellent communication and collaboration across geographies.

Responsibilities

• Develop OE systems in advanced Si photonics process technologies for DWDM and CWDM applications in next generation AI and HPC applications.
• Innovation, product definition and specification of PIC architectures, TX chains, RX chains, components and test methodologies to meet demanding next generation Optical IO applications.
• Work with systems teams to devise, maintain, simulate and optimize Optical IO link budgets reflecting key product requirements, PIC architectures, channel properties, active device component and passive component limits as well as foundry process technology capabilities.
• Collaborate on design-for-test best practices to ensure that photonic devices will be ready for high-volume manufacturing.
• Participate in design reviews as a subject matter expert in silicon photonic component design.
• Work cross functionally with EIC, packaging, foundry technology, test development, and product teams to architect appropriate design and test automation solutions.

Skills

PIC theory

Device design

Circuit layout

Simulation

Packaging

Debug

Test

Manufacturing

Reliability

Qualification & support

Python

Cadence

Software architecture

Test automation

Data analysis

Education

Bachelor's or Master’s degree in related discipline

Tools

Cadence

Python

Test instrumentation

Job description

AMD is seeking a seasoned technical contributor to drive end-to-end delivery of PIC solutions for optical IO in AI and HPC workloads. You will coordinate across hardware engineering and AMD partners to plan, develop, and optimize PIC implementations for next-generation GPUs.

You are a subject-matter expert in PIC theory, design, layout, and manufacturing, with a track record in DFx, packaging, test, and reliability.