Senior Silicon Photonics Device Design Engineer

Work Options Group; Temecula (CA); On-site; USD 150,000 - 230,000; Full time

Benefits offered by this job

Competitive salary

Medical

Dental

Vision

401(k)

Company paid life insurance

Company paid disability

Paid holidays

Gym Membership Discounts

Job summary

Skorpios Technologies, Inc. is seeking a top-level Si Photonics Device Design Engineer to develop next-generation Si Photonics chips and modules.

You will work in a high-performance team on disruptive technology, designing devices such as optical couplers, WDMs, polarization components and hybrids for integration in system chips. The role involves optical simulations, fabrication-aware design, testing, and close collaboration with layout engineers, with emphasis on delivering high-performance,

Qualifications

• 10+ years in photonics device design and characterization.
• PhD/MS in physics, EE or materials with photonics focus.
• Strong background in optical devices and polarization components.

Responsibilities

• Design, model and simulate high performance Si photonics devices.
• Model thermal responses and optical mode matching over wide ranges.
• Establish design rules for DRC and manufacturability.
• Coordinate with HPIC layout and perform DOE design/validation testing.
• Prepare design reviews and communicate results clearly.

Skills

Silicon photonics

Optical design

Optical simulations

Design for manufacturability

DOE design & validation

Layout collaboration

Education

MS or PhD in Physics, Electrical Engineering, or Materials

Tools

Ansys

Lumerical

Zemax

Speos

JMP

Mini-Tab

Job description

Skorpios Technologies, Inc. is seeking a top-level Si Photonics Device Design Engineer to develop next-generation Si Photonics chips and modules.

You will work in a high-performance team on disruptive technology, designing devices such as optical couplers, WDMs, polarization components and hybrids for integration in system chips. The role involves optical simulations, fabrication-aware design, testing, and close collaboration with layout engineers, with emphasis on delivering high-performance,