Senior Remote SOC/IP Integration Engineer

Arrow Electronics; Oregon; Hybrid; USD 110,000 - 150,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance

401k with Matching Contributions

Short-Term/Long-Term Disability

HSA/HRA Options

Paid Time Off

Tuition Reimbursement

Growth Opportunities

Job summary

Arrow Electronics, in collaboration with its eInfochips unit, seeks an experienced SOC/IP Integration Engineer to lead RTL design understanding and subsystem/SoC integration. You will integrate 1P and 3P IPs, ensure timing and quality closures, and maintain close customer communication on progress.

The role emphasizes independent problem solving, mentorship, and process improvements with a strong background in Verilog/SystemVerilog and synthesis. Travel to client sites may be required.

Qualifications

• Requires in-depth knowledge and experience
• Solves complex problems; takes a new perspective using existing solutions
• Works independently; receives minimal guidance
• Acts as a resource for colleagues with less experience
• Typically requires 5-7 years of related experience with a 4 year degree; or 3 years and an advanced degree; or equivalent work experience

Responsibilities

• Understand RTL design and digital concepts
• Subsystem or SoC integration
• Integration of 1P and 3P IPs; generate 3P fabrics; perform quality checks and PD handoff
• SoC integration using Verilog/SystemVerilog; focus on synthesis, timing constraints, floorplanning considerations, performance optimization, and design-quality closure (CDC, Lint, RDC, register integration)
• Ensure customer satisfaction and report progress to customers regularly

Skills

RTL design

Digital concepts

Independent work

Mentor juniors

Process improvements

Education

4 year degree

Advanced degree optional

Tools

Verilog

SystemVerilog

Synthesis

Timing constraints

CDC/Lint/RDC

Job description

Arrow Electronics, in collaboration with its eInfochips unit, seeks an experienced SOC/IP Integration Engineer to lead RTL design understanding and subsystem/SoC integration. You will integrate 1P and 3P IPs, ensure timing and quality closures, and maintain close customer communication on progress.

The role emphasizes independent problem solving, mentorship, and process improvements with a strong background in Verilog/SystemVerilog and synthesis. Travel to client sites may be required.