Senior Reliability Engineer - NPD & Qualification

Onsemi; San Jose (CA); Hybrid; USD 131,000 - 223,000; Full time

Job summary

onsemi in San Jose, CA is hiring a Principal Reliability Engineer. This individual contributor will lead reliability activities for NPD projects, coordinate with Design, Marketing, Technology, PI, PE, TE and PKG teams, and drive DfR strategy and qualification execution.

You will perform DOE, material and process characterization, write qualification reports, assess risks, and ensure Test Quality in the NPD process. A strong background in CMOS reliability and industry standards is required.

Qualifications

• Bachelor’s degree in an engineering discipline; MS/PhD preferred.
• Minimum 8 years in semiconductor IC reliability or related fields.
• Experience with reliability stress methods and product qualification.
• Familiar with industry standards (AEC Q100, JEDEC, IPC).
• Knowledgeable in CMOS device physics and reliability statistics.
• Experience with CMOS packaging and semiconductor packaging failure modes.
• Strong problem solving and communication skills.

Responsibilities

• Develop and execute DfR strategies and qualification plans for NPD.
• Coordinate with cross-functional teams to ensure design-for-reliability.
• Lead qualification readiness checks for NPD projects.
• Analyze qualification test data and perform root cause analysis.
• Prepare reliability qualification reports and risk assessments.

Skills

Reliability engineering

NPD collaboration

DOE

Drift analysis

Statistical analysis

Education

Bachelor’s degree in Engineering

MS or PhD in Electrical Engineering

Job description

onsemi in San Jose, CA is hiring a Principal Reliability Engineer. This individual contributor will lead reliability activities for NPD projects, coordinate with Design, Marketing, Technology, PI, PE, TE and PKG teams, and drive DfR strategy and qualification execution.

You will perform DOE, material and process characterization, write qualification reports, assess risks, and ensure Test Quality in the NPD process. A strong background in CMOS reliability and industry standards is required.