Senior Process Engineer

black.ai; Palo Alto (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

black.ai is seeking a Senior Process Engineer in Palo Alto, California, to support new silicon photonic product development. You will be responsible for optimizing semiconductor processes, enhancing yield, and managing cross-department projects.

With a minimum of 5 years in semiconductor processing, expertise in data analysis, and experience in vendor relationship management, you will drive impactful results in a fast-paced startup environment, contributing to quantum computing advancements.

Qualifications

• Minimum 5 years of experience in semiconductor processing.
• Prior experience in process development, implementation, and transfer to a HVM.
• Experience with dicing, defect inspection, and post fab processing.

Responsibilities

• Develop processes that meet semiconductor performance requirements.
• Interface with packaging & assembly teams representing the foundry team on wafer process flows.
• Drive failure analysis of PICs post dicing.

Skills

Semiconductor processing

Process development

Data analysis

Statistical Process Control (SPC)

Design of Experiments (DOE)

Yield improvement

Vendor relationship management

Critical thinking

Tools

JMP

Job description

Job Summary

The Senior Process Engineer will support the development of a new silicon photonic product. They will drive the processes needed to deliver a Photonic Integrated Circuits (PIC) that meets our technology requirements and interface closely with the design and sub-assembly teams for co-optimization. They will drive the yield improvement processes through careful defect inspection and failure analysis with an emphasis on post fab processes and downstream sub-assembly.

Responsibilities

• Develop processes that meet semiconductor performance requirements.
• Interface with packaging & assembly teams representing the foundry team on wafer process flows.
• Optimize processes to enhance yield and improve stability and/or reliability.
• Drive failure analysis of PICs post dicing.
• Ability to drive development projects and manage vendor relationships.
• Use data analysis skills (Ex: JMP) to develop new process.
• Structured risk management and model-based problem-solving skills (FMEA, 8D, 5-why).
• Understanding and knowledge of Statistical Process Control (SPC) and/or Design of Experiments (DOE).

Experience / Qualifications

• Minimum 5 years of experience in semiconductor processing.
• Prior experience in process development, implementation, and transfer to a HVM.
• Experience with dicing, defect inspection, and post fab processing.
• Experience with metrology and material analysis.
• Proven experience executing cross-department complex projects.
• Experience in vendor relationship management.
• Experience with test structures for yield limiter determination and improvement.
• Strong critical thinking, creative, innovative, analytical, and detail-oriented problem-solving skills.
• Proven track record of impactful results.
• Self-motivated and resourceful.
• Demonstrated ability to juggle multiple priorities and deliver against a schedule.
• Demonstrated interest in quantum computing and silicon photonics.
• Ability to contribute in a fast-moving start-up environment.

Equal Employment Opportunity

PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws.