Senior Principal FPGA & Digital Signals Processing Engineer

Jobtailor

Alexandria (VA)

On-site

USD 140,000 - 190,000

Full time

12 days ago

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Job summary

Jobtailor is seeking a lead FPGA firmware architect to advance Dragonfly's signal-processing across FPGA, GPU, and CPU. You will migrate GPU DSP into FPGA, optimize fixed-point designs, and deliver reusable IP for RFSoC/Versal platforms.

Real-time RF processing, protocol handling for Wi-Fi/Bluetooth/LoRa/LTE/5G NR, and beamforming capabilities are central to the role. Join a technically rigorous team, mentor engineers, and shape roadmaps for EW/SIGINT capability development.

Qualifications

Bachelor's degree required in Electrical Engineering or related field.
10+ years FPGA development experience in RF/SIGINT/wireless/Radar systems.
Ownership of FPGA architecture from concept to production.
Active Secret clearance required; TS/SCI preferred.
Proficiency in VHDL and/or SystemVerilog; RTL design, pipelining, clock domain crossing, timing closure.
Experience with AMD/Xilinx tools: Vivado, Vitis, Vitis HLS; RFSoC/Versal.
Strong DSP background: FFTs, down/up conversion, fixed-point, AGC, CORDIC.
Proficiency in MATLAB and/or Python for algorithm development and verification; C/C++ in Linux.
Experience with high-speed interfaces: AXI, PCIe, Ethernet, DDR, JESD204B/C.
FPGA simulation, debugging, board bring-up, RF lab validation.
Git, Agile methodologies; cross-functional hardware/software teams.
Experience migrating CUDA/GPU DSP to FPGA preferred.
Experience with beamforming, direction finding, geolocation algorithms preferred.
Knowledge of LTE/5G NR/Wi-Fi/Bluetooth/LoRa/LTE waveforms preferred.
Familiarity with RFNoC, GNU Radio, OpenCPI, SOSA, CMOSS preferred.

Responsibilities

Lead FPGA firmware architecture for Dragonfly across FPGA, GPU, and CPU.
Migrate GPU DSP algorithms into FPGA implementations including fixed-point conversion and verification.
Design reusable FPGA IP for AMD/Xilinx RFSoC, Versal, UltraScale+, Zynq.
Develop real-time FPGA implementations for RF signal processing: DDC, filters, FFTs, channelization.
Implement and optimize wireless protocol processing (Wi-Fi, Bluetooth, LoRa, LTE, 5G NR).
Develop FPGA capabilities for beamforming, direction finding, geolocation, multi-channel processing.
Establish FPGA verification methodologies: simulation, regression tests, timing closure, OTA testing.
Support hardware bring-up, production validation, field testing of Dragonfly systems.
Act as technical authority for FPGA firmware and DSP architecture; mentor engineers.
Contribute to roadmaps, customer engagements, IRAD, and EW/SIGINT capability development.

Skills

FPGA development

DSP algorithm development

VHDL/SystemVerilog

AMD/Xilinx tools

Active Secret Clearance

CUDA DSP migration

Beamforming/Direction finding

MATLAB/Python

C/C++ in Linux

FPGA verification

Education

Bachelor's degree in Electrical Engineering

Tools

Vivado

Vitis

MATLAB

Python

C/C++

Git

Agile Development

Job description

Lead the FPGA firmware architecture for Dragonfly, defining signal-processing partitioning across FPGA, GPU, and CPU to meet latency, throughput, and SWaP requirements
Migrate GPU-based DSP algorithms into efficient FPGA implementations, including floating-to-fixed-point conversion, quantization analysis, word-length optimization, and bit-accurate verification
Design reusable, portable FPGA IP for AMD/Xilinx RFSoC, Versal, UltraScale+, and Zynq platforms
Develop real-time FPGA implementations for RF signal processing, including digital down conversion, filtering, FFTs, channelization, synchronization, demodulation, and protocol exploitation
Implement and optimize wireless protocol processing for Wi-Fi, Bluetooth/BLE, LoRa, LTE, and 5G NR
Develop FPGA capabilities for direction finding, beamforming, geolocation, and multichannel phase-coherent signal processing
Establish FPGA verification methodologies, including simulation, automated regression testing, timing closure, hardware validation, and over-the-air testing
Support hardware bring-up, integration, production validation, and field testing of Dragonfly systems
Serve as technical authority for FPGA firmware and DSP architecture; conduct design reviews, mentor engineers, and establish engineering best practices
Contribute to product roadmaps, customer engagements, technical proposals, IRAD efforts, and emerging EW/SIGINT capability development

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
10+ years of FPGA development experience supporting RF, SDR, SIGINT, radar, wireless communications, or Electronic Warfare systems
Demonstrated ownership of FPGA architecture from concept through deployed production systems
Active Secret clearance required
Ability to obtain or maintain TS/SCI preferred
Expert proficiency with VHDL and/or SystemVerilog, RTL design, pipelining, finite state machines, clock domain crossing, and timing closure
Extensive experience with AMD/Xilinx development tools including Vivado, Vitis, Vitis HLS, and RFSoC or Versal platforms
Strong background in DSP, including FFTs, digital down/up conversion, FIR/IIR/CIC filters, multirate processing, fixed-point design, CORDIC, and AGC
Experience with high-speed interfaces including AXI, PCIe, Ethernet, DDR memory, Aurora, and JESD204B/C
Proficiency with MATLAB and/or Python for algorithm development and hardware verification, plus C/C++ development in Linux environments
Experience with FPGA simulation, debugging, board bring-up, and RF laboratory validation using industry-standard tools
Familiarity with Git, Agile development methodologies, and cross-functional hardware/software engineering teams
Experience developing CUDA or GPU-based DSP algorithms and migrating them to FPGA implementations preferred as an additional qualification
Experience with beamforming, direction finding, geolocation, MUSIC/ESPRIT, TDOA, or FDOA algorithms preferred as an additional qualification
Knowledge of LTE, 5G NR, Wi-Fi, Bluetooth/BLE, LoRa, or other modern communications waveforms preferred as an additional qualification
Experience with HLS, Simulink, MATLAB HDL Coder, or Model Composer preferred as an additional qualification
Familiarity with RFNoC, GNU Radio, OpenCPI, SOSA, or CMOSS architectures preferred as an additional qualification

Core Competencies

Demonstrates expertise in FPGA firmware architecture and DSP, with a strong focus on real-time implementations for RF signal processing and wireless protocols. Proficient in VHDL, SystemVerilog, and AMD/Xilinx development tools, with a proven track record in leading projects from concept to production.

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