Senior Principal FPGA & Digital Signals Processing Engineer

Researchinnovations.Com; Alexandria (VA); Hybrid; USD 170,000 - 230,000; Full time

Benefits offered by this job

flexible work schedules

health insurance coverage

paid time off

401k with company match

paid parental leave

wellness programs

Job summary

Research Innovations Incorporated is seeking a Senior Principal FPGA & DSP Engineer to lead FPGA firmware architecture, migrate GPU DSP to FPGA, and develop high-performance FPGA IP for RFSoC, Versal, and related platforms.

You will design real-time FPGA implementations for advanced RF signal processing, support domain-specific protocols, and mentor a diverse engineering team across hardware, software, and AI disciplines.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 10+ years of FPGA development experience supporting RF, SDR, SIGINT, radar, wireless communications, or EW systems.
• Ownership of FPGA architecture from concept through deployed systems.
• Active TS/SCI clearance; ability to obtain TS/SCI preferred.
• Proficiency with VHDL and/or SystemVerilog, RTL design, pipelining, and timing.
• Experience with AMD/Xilinx tools including Vivado, Vitis, RSA, RFSoC/Versal platforms.
• Strong DSP background: FFTs, DDC/DUC, FIR/IIR/CIC, fixed-point, CORDIC, AGC.
• Experience with interfaces: AXI, PCIe, Ethernet, DDR, JESD204B/C.
• MATLAB/Python for algo dev and hardware verification; C/C++ in Linux.

Responsibilities

• Lead FPGA firmware architecture for Dragonfly, partitioning signal processing across FPGA, GPU, and CPU.
• Migrate GPU DSP algorithms to FPGA with fixed-point optimization and verification.
• Design portable FPGA IP for AMD/Xilinx platforms (RFSoC, Versal, UltraScale+).
• Develop real-time FPGA implementations for RF processing (down conversion, filtering, FFTs, channelization).
• Implement wireless protocol processing for Wi-Fi, Bluetooth/BLE, LoRa, LTE, 5G NR.

Skills

FPGA architecture

DSP

VHDL/SystemVerilog

Python

C/C++

MATLAB

Git/Agile

Education

Bachelor's degree in Electrical/Computer Engineering

Master's or PhD preferred

Tools

Vivado/Vitis

RFSoC/Versal/UltraScale+ hardware

RFNoC

Job description

Position Title: Senior Principal Field Programmable Gate Array & Digital Signal Processing Engineer

Location: Hybrid, in office in Alexandria, VA

Clearance Requirement: TS/SCI

Employment Type: Full Time

Research Innovations, Inc. (RII) is breaking through the big, slow status quo with transformative technology that fundamentally improves the world. We build advanced software solutions for government and military missions, applying agile development and user-centered design to solve complex, mission-critical problems.

Dragonfly is redefining tactical SIGINT and Electronic Warfare by combining advanced RF sensing, GPU-accelerated processing, artificial intelligence, and high-performance FPGA architectures into a portable, mission-ready platform. As the Principal FPGA & DSP Engineer, you will serve as the technical leader responsible for designing and delivering the next generation of real-time FPGA-based signal processing capabilities that enable rapid spectrum awareness, signal exploitation, and electronic warfare operations. Working closely with hardware, software, AI, and RF engineering teams, you will architect high-performance firmware solutions that transform advanced algorithms into deployable capabilities supporting the Department of Defense, Intelligence Community, and allied mission partners.

• Lead the FPGA firmware architecture for Dragonfly, defining the optimal partitioning of signal processing across FPGA, GPU, and CPU to meet mission latency, throughput, and SWaP requirements.

• Migrate GPU-based digital signal processing algorithms into efficient FPGA implementations, including floating-to-fixed point conversion, quantization analysis, word-length optimization, and bit-accurate verification.

• Design reusable, portable FPGA IP that supports multiple AMD/Xilinx platforms including RFSoC, Versal, UltraScale+, and Zynq.

• Develop real-time FPGA implementations for advanced RF signal processing including digital down conversion, filtering, FFTs, channelization, synchronization, demodulation, and protocol exploitation.

• Implement and optimize wireless protocol processing for technologies such as Wi-Fi, Bluetooth/BLE, LoRa, LTE, and 5G NR.

• Develop FPGA capabilities supporting direction finding (DF), beamforming, geolocation, and multi-channel phase-coherent signal processing.

• Establish FPGA verification methodologies including simulation, automated regression testing, timing closure, hardware validation, and over-the-air testing.

• Support hardware bring-up, integration, production validation, and field testing of Dragonfly systems.

• Serve as the technical authority for FPGA firmware and DSP architecture, conducting design reviews, mentoring engineers, and establishing engineering best practices.

• Contribute to product roadmap development, customer engagements, technical proposals, IRAD efforts, and emerging EW/SIGINT capability development.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; Master's or PhD preferred.

• 10+ years of FPGA development experience supporting RF, SDR, SIGINT, radar, wireless communications, or Electronic Warfare systems.

• Demonstrated ownership of FPGA architecture from concept through deployed production systems.

• Active Secret clearance required; ability to obtain or maintain TS/SCI preferred.

• Expert proficiency with VHDL and/or SystemVerilog, RTL design, pipelining, finite state machines, clock domain crossing, and timing closure.

• Extensive experience with AMD/Xilinx development tools including Vivado, Vitis, Vitis HLS, and RFSoC or Versal platforms.

• Strong background in digital signal processing including FFTs, digital down/up conversion, FIR/IIR/CIC filters, multirate processing, fixed‑point design, CORDIC, and AGC.

• Experience implementing high-speed interfaces including AXI, PCIe, Ethernet, DDR memory, Aurora, and JESD204B/C.

• Proficiency with MATLAB and/or Python for algorithm development and hardware verification, along with C/C++ development in Linux environments.

• Experience with FPGA simulation, debugging, board bring‑up, and RF laboratory validation using industry-standard tools.

• Familiarity with Git, Agile development methodologies, and cross‑functional hardware/software engineering teams.

• Experience developing CUDA or GPU-based DSP algorithms and migrating them to FPGA implementations.

• Experience implementing beamforming, direction finding, geolocation, MUSIC/ESPRIT, TDOA, or FDOA algorithms.

• Knowledge of LTE, 5G NR, Wi‑Fi, Bluetooth/BLE, LoRa, or other modern communications waveforms.

• Experience with High‑Level Synthesis (HLS), Simulink, MATLAB HDL Coder, or Model Composer.

• Familiarity with RFNoC, GNU Radio, OpenCPI, SOSA, or CMOSS architectures.

At RII, we believe that diversity in our workforce is critical to our success. We strive to hire great people from a wide variety of backgrounds, not just because it’s the right thing to do, but because it makes us stronger. We work to help your intellectual passions and creativity thrive. It’s one of our core values: Let your geek flag fly.

We also offer all employees comprehensive benefits including: flexible work schedules, health insurance coverage, paid time off, 401k with a company match, paid parental leave, access to wellness programs and much more.

• flexible work schedules
• health insurance coverage
• paid time off
• 401k with a company match
• paid parental leave
• access to wellness programs and much more

It’s all part of another of our core values: Stay human. It’s why our comfortable and colorful offices such as our headquarters, include a community game room, pantry, massage chair, and an escape room, among other amenities. It’s why we have community ambassadors and regular community events.

Research Innovations Incorporated is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other characteristic protected by applicable law.