Senior Principal Engineer - Signal Integrity
Celestica Inc.
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Job summary
Qualifications
- 12+ years experience with High Speed Signal Delivery Design and Evaluation.
- Strong ability to lead, motivate and direct a workgroup.
- Proficient in hardware systems environments and detail-oriented.
Responsibilities
- Define and develop next generation technologies for Networking, server, and storage products.
- Serve as technical consultant and technical leader for their team.
- Engage with customers and suppliers on product roadmaps and support.
Skills
Education
Tools
Job description
Date: Apr 20, 2026
Location: San Jose, CA, US
Celestica Engineering is seeking a highly motivated and self‑driven candidate qualified for the position of Signal Integrity Engineer to help design and build market‑leading Hardware Platform Solutions.
The Signal Integrity Engineer will play a critical role as the subject matter expert in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues on completed designs. They will also be expected to help with design review of critical PCBs for signal integrity concerns. Good communication skills and ability to work with physically dispersed teams is a strong requirement
- Define and develop next generation technologies for Networking, server and storage products.
- Provides innovative solutions to unusually complex and sensitive problems requiring ingenuity and creativity.
- Serve as technical consultant and technical leader for their team.
- Engage with customers and suppliers on product roadmaps and support.
- Communicates progress toward projects and program goals.
- Strong ability to lead, motivate and direct a workgroup.
- Proficiency in hardware systems environments and detail oriented.
- Strong organizational skills.
- Cross‑Functional capabilities.
- PCB design fundamentals (single ended and differential signals)
- Signal loss • Impedance control • Crosstalk (near end and far end)
- Experienced with single‑ended and differential signaling up to 50Gbps
- Experienced working with component models (touchstone files) and cascading models to generate complete system models for simulation
- Simulation of digital interfaces (FPGA to DRAM, SERDES interfaces)
- Simulation of analog paths through a combination of PCB, connector, and cable (signal driver to DUT)
- Proficient with 2D and 3D simulation tools (examples include ADS, ANSYS HFSS, Sigrity)
- Electrical length calculations for signal matching
- Familiar with looking at signals in both frequency (S‑parameter) and time domain and understanding how to interpret results when it comes to suitability for a particular application.
- Very familiar with generating and interpreting data‑eye diagrams up to 50Gbps: NRZ and PAM4
- Proficient with Allegro or similar layout tool and schematics
- PCB stack‑up design and familiar with fabrication limitations and cost trade‑offs
- High‑frequency board material experience
- Significant experience with measuring signal performance in the lab: TDR measurements and VNA measurements
- Able to develop test fixtures for making measurements (both custom design test boards as well as making “ad hoc” probing solutions to troubleshoot existing PCBs)
- Expert in cost vs performance trade‑offs when designing signal paths as cost is key design constraint
- Experience with flex circuit design for high‑speed signaling Education
12+ years experience with High Speed Signal Delivery Design and Evaluation. This includes both signal integrity within a PCB and off the board (board to board connectors, ribbon cables, coaxial cable, etc.).
Bachelor’s degree in Electrical Engineering, Master’s is preferred
$200,000- $351,000
The salary range described in this posting is an estimate by the Company, and may change based on several factors, including but not limited to a change in the duties covered by the job posting, or the credentials, experience or geographic jurisdiction of the successful candidate.
This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.
Celestica is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, pregnancy, genetic information, disability, status as a protected veteran, or any other protected category under applicable federal, state, and local laws.
This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated.
All information will be kept confidential according to EEO guidelines.
Celestica is an E‑Verify employer.
Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto
Job Segment: Electrical Engineering, Aerospace Engineering, Design Engineer, Electrical, Supply Chain, Engineering, Operations
'/%3e%3cpath%20d='M101.744%2012.4726L102.894%2016.1947L99.0021%2013.2201L101.744%2012.4726ZM105.3%208.40937H100.488L99.0026%203.59473L97.5116%208.41047L92.7%208.40385L96.5965%2011.3834L95.1055%2016.1942L99.0021%2013.2196L101.408%2011.3834L105.3%208.40992V8.40937Z'%20fill='white'/%3e%3cdefs%3e%3clinearGradient%20id='paint0_linear_5593_1381'%20x1='90'%20y1='9.44471'%20x2='99'%20y2='9.44471'%20gradientUnits='userSpaceOnUse'%3e%3cstop%20stop-color='%2300AD70'/%3e%3cstop%20offset='0.998594'%20stop-color='%2300B67A'/%3e%3cstop%20offset='1'%20stop-color='%23DCDCE6'/%3e%3c/linearGradient%3e%3c/defs%3e%3c/svg%3e){kind=small}
